參數(shù)資料
型號: TAS5711PHPR
廠商: Texas Instruments
文件頁數(shù): 17/66頁
文件大小: 0K
描述: IC AMP AUD DGTL 20W 2CH 48HTQFP
標準包裝: 1
類型: D 類
輸出類型: 2 通道(立體聲,2.1)或 4 通道(四路)
在某負載時最大輸出功率 x 通道數(shù)量: 21W x 2 @ 8 歐姆
電源電壓: 8 V ~ 26 V
特點: 消除爆音,數(shù)字輸入,I²C,I²S,靜音,短路和熱保護,關機,音量控制
安裝類型: 表面貼裝
供應商設備封裝: 48-HTQFP(7x7)
封裝/外殼: 48-TQFP 裸露焊盤
包裝: 標準包裝
產(chǎn)品目錄頁面: 860 (CN2011-ZH PDF)
其它名稱: 296-25564-6
FAULT
~300ns
ProgrammableRecovery Time
PowerStage
FaultState
FAULT
NO-FAULT
T0450-01
SLOS600A – DECEMBER 2009 – REVISED AUGUST 2010
www.ti.com
Table 1. FAULT Output States (continued)
Figure 36. Fault Timing Diagram
DEVICE PROTECTION SYSTEM
Overcurrent (OC) Protection With Current Limiting
The device has independent, fast-reacting current detectors on all high-side and low-side power-stage FETs. The
detector outputs are closely monitored by two protection systems. The first protection system controls the power
stage in order to prevent the output current further increasing, i.e., it performs a cycle-by-cycle current-limiting
function, rather than prematurely shutting down during combinations of high-level music transients and extreme
speaker load impedance drops. If the high-current condition situation persists, i.e., the power stage is being
overloaded, a second protection system triggers a latching shutdown, resulting in the power stage being set in
the high-impedance (Hi-Z) state. The device returns to normal operation once the fault condition (i.e., a short
circuit on the output) is removed. Current limiting and overcurrent protection are not independent for half-bridges.
That is, if the bridge-tied load between half-bridges A and B causes an overcurrent fault, half-bridges A, B, C,
and D are shut down.
Overtemperature Protection
The TAS5711 has over temperature-protection system. If the device junction temperature exceeds 150°C
(nominal), the device is put into thermal shutdown, resulting in all half-bridge outputs being set in the
high-impedance (Hi-Z) state and FAULT being asserted low. The TAS5711 recovers automatically once the
temperature drops approximately 30°.
Undervoltage Protection (UVP) and Power-On Reset (POR)
The UVP and POR circuits of the TAS5711 fully protect the device in any power-up/down and brownout situation.
While powering up, the POR circuit resets the overload circuit and ensures that all circuits are fully operational
when the PVDD and AVDD supply voltages reach 7.6 V and 2.7 V, respectively. Although PVDD and AVDD are
independently monitored, a supply voltage drop below the UVP threshold on AVDD or either PVDD pin results in
all half-bridge outputs immediately being set in the high-impedance (Hi-Z) state and FAULT being asserted low.
SSTIMER FUNCTIONALITY
The SSTIMER pin uses a capacitor connected between this pin and ground to control the output duty cycle when
exiting all-channel shutdown. The capacitor on the SSTIMER pin is slowly charged through an internal current
source, and the charge time determines the rate at which the output transitions from a near zero duty cycle to the
desired duty cycle. This allows for a smooth transition that minimizes audible pops and clicks. When the part is
shutdown the drivers are tristated and transition slowly down through a 3K resistor, similarly minimizing pops and
clicks. The shutdown transition time is independent of SSTIMER pin capacitance. Larger capacitors will increase
the start-up time, while capacitors smaller than 2.2 nF will decrease the start-up time. The SSTIMER pin should
be left floating for BD modulation (BTL and PBTL modes) and in 2.1 mode.
24
Copyright 2009–2010, Texas Instruments Incorporated
Product Folder Link(s): TAS5711
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