
SLAS712B
– JUNE 2010 – REVISED MARCH 2011
ABSOLUTE MAXIMUM RATINGS
over operating free-air temperature range unless otherwise noted
(1)
TAS5614A
UNIT
VDD to GND
–0.3 to 13.2
V
GVDD to GND
–0.3 to 13.2
V
PVDD_X to GND_X(2)
–0.3 to 53
V
OUT_X to GND_X(2)
–0.3 to 53
V
BST_X to GND_X(2)
–0.3 to 66.2
V
BST_X to GVDD_X(2)
–0.3 to 53
V
VREG to GND
–0.3 to 4.2
V
GND_X to GND
–0.3 to 0.3
V
GND to AGND
–0.3 to 0.3
V
OC_ADJ, M1, M2, M3, OSC_IO+, OSC_IO-, FREQ_ADJ, VI_CM, C_STARTUP, PSU_REF
–0.3 to 4.2
V
to GND
INPUT_X
–0.3 to 7
V
RESET, SD, OTW1, OTW2, CLIP, READY to GND
–0.3 to 7
V
Maximum continuous sink current (SD, OTW1, OTW2, CLIP, READY)
9
mA
Maximum operating junction temperature range, TJ
0 to 150
°C
Storage temperature, Tstg
–40 to 150
°C
Human body model(3) (all pins)
±2
kV
Electrostatic discharge
Charged device model(3) (all pins)
±500
V
(1)
Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating
Conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
(2)
These voltages represents the DC voltage + peak AC waveform measured at the terminal of the device in all conditions.
(3)
Failure to follow good anti-static ESD handling during manufacture and rework will contribute to device malfunction. Make sure the
operators handling the device are adequately grounded through the use of ground straps or alternative ESD protection.
RECOMMENDED OPERATING CONDITIONS
over operating free-air temperature range (unless otherwise noted)
MIN NOM
MAX
UNIT
PVDD_x
Half-bridge supply
DC supply voltage
18
36
38
V
Supply for logic regulators and gate-drive
GVDD_x
DC supply voltage
10.8
12
13.2
V
circuitry
VDD
Digital regulator supply voltage
DC supply voltage
10.8
12
13.2
V
RL(BTL)
3.5
4
Output filter according to schematics in
RL(SE)
Load impedance
2.8
3
the application information section.
RL(PBTL)
1.6
2
Output filter according to schematics in
the application information section. ROC =
RL(BTL)
Load impedance
2.8
3
Ω
22k
Ω, add Schottky diodes from OUT_X
to GND_X.
LOUTPUT(BTL)
7
10
LOUTPUT(SE)
Output filter inductance
Minimum output inductance at IOC
7
15
μH
LOUTPUT(PBTL)
7
10
FPWM
PWM frame rate
352
384
500
kHz
CPVDD
PVDD close decoupling capacitors
2
μF
ROC
Over-current programming resistor
Resistor tolerance = 5%
22
30
k
Ω
ROC_LATCHED
Over-current programming resistor
Resistor tolerance = 5%
47
64
k
Ω
TJ
Junction temperature
0
125
°C
4
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2010–2011, Texas Instruments Incorporated