TAS5182
SLES045E - JUNE 2002 - REVISED MAY 2004
www.ti.com
11
Board configuration:
D 1R0 resistors on SHS and GLS connections
D GV
DD = 12 V, PVDD = 40 V
D 10BQ060 voltage clamp on output node
D TT snubbers: L = 75 nH, C = 10 nF, R = 5.4
OC_HIGH
VRFILT = 1.8 V
TAS5182
9
8
VOC
Figure 5. Overcurrent Configuration Circuit
OC_LOW
27
V-HBRIDGE
220 k
W
220 k
W
22 k
W
22 k
W
10 k
W
10 k
W
1 M
W
1 M
W
Overtemperature Programming Circuit
The TAS5182 device features a temperature protection
system that uses an external negative temperature
coefficient (NTC) resistor as a temperature sensor.
Figure 6 shows a typical application.
Figure 6. Temperature Sensing Circuit
TEMP
DVDD
TAS5182
3
28
DVSS
4
R(NTC)
47 k
W
DVDD Supply
R1
16 k
W
The temperature protection system has two trigger limits:
OT warning and OT error. OT warning occurs when the
voltage at the TEMP terminal is approximately 36% of
DVDD. OT error occurs when the voltage at the TEMP
terminal is approximately 23% of DVDD. OT warning is
decoded
when
ERR0
=
0,
ERR1
=
1,
and
SHUTDOWN = 1. OT error is decoded when ERR0 = 0,
ERR1 = 1, and SHUTDOWN = 0. The user for a particular
application determines the values of R1 and RNTC. Typical
values are R1 = 16 k
and RNTC = 47 k.
THERMAL INFORMATION
The thermally enhanced DCA package is based on the
56-pin HTSSOP, but includes a thermal pad (see Figure 7)
to provide an effective thermal contact between the IC and
the PCB.
Traditionally, surface mount and power have been
mutually exclusive terms. A variety of scaled-down
TO-220 type packages have leads formed as gull wings to
make them applicable for surface-mount applications.
These packages, however, have two shortcomings: they
do not address the low profile requirements (< 2 mm) of
many of today’s advanced systems and they do not offer
a terminal count high enough to accommodate increasing
integration.
However,
traditional
low-power,
surface-mount
packages
require
power-dissipation
derating that severely limits the usable range of many
high-performance analog circuits
The
PowerPAD
t package (thermally enhanced
HTSSOP) combines fine-pitch, surface-mount technology
with thermal performance comparable to much larger
power packages.
The PowerPAD package is designed to optimize the heat
transfer to the PCB. Because of the small size and limited
mass of a HTSSOP package, thermal enhancement is
achieved by improving the thermal conduction paths that
remove heat from the component. The thermal pad is
formed using a patented lead-frame design and
manufacturing technique to provide a direct connection to
the heat-generating IC. When this pad is soldered to the
PCB, good power dissipation in the ultrathin, fine-pitch,
surface-mount package can be reliably achieved. See
Reference 4 for recommended soldering procedure.
THERMAL DATA
PARAMETER
MIN
TYP
MAX
UNIT
Junction temperature, TJ(SD)
150
_C
Operating temperature, TC
Commercial
0
25
70
_C
pg
p
,
Industrial
-40
25
85
_C
Thermal resistance,
θjc
Pad with solder (1)
0.27
_C/W
Thermal resistance,
θja
21.17
_C/W
Thermal resistance,
θjc
Pad without solder (1)
0.27
_C/W
Thermal resistance,
θja
36.42
_C/W