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參數(shù)資料
| 型號： | TAS5121IDKD |
| 廠商： | TEXAS INSTRUMENTS INC |
| 元件分類： | 音頻／視頻放大 |
| 英文描述： | 100 W, 2 CHANNEL, AUDIO AMPLIFIER, PDSO36 |
| 封裝： | GREEN, PLASTIC, HSSOP-36 |
| 文件頁數(shù)： | 22/22頁 |
| 文件大?。?/td> | 632K |
| 代理商： | TAS5121IDKD |
www.ti.com
THEORY OF OPERATION
POWER SUPPLIES
Recommendations for Powering Up
RESET
GVDD
PVDD_X
PWM_xP
> 1 ms
TAS5121I
SLES122 – SEPTEMBER 2004
This power device requires only two power supply voltages: GVDD_x and PVDD_x.
GVDD_x is the gate drive supply for the device, which is usually supplied from an external 12-V power supply.
GVDD_x is also connected to an internal LDR that regulates the GVDD_x voltage down to the logic power
supply, 3.3 V, for the TAS5121I internal logic blocks. Each GVDD_x pin is decoupled to system ground by a 1-
F
capacitor.
PVDD_x is the H-bridge power supply. Two power pins are provided for each half-bridge due to the high current
density. It is important to follow the circuit and PCB layout recommendations for the design of the PVDD_x
connection. For component suggestions, see the Typical Application Configuration Used With TAS5026 PWM
Processor section in this document. Following these recommendations is important because they influence key
system parameters such as EMI, idle current, and audio performance.
When GVDD_x is applied, while RESET is held low, the error latches are cleared, SHUTDOWN is set high, and
the outputs are held in a high-impedance state. The bootstrap (BST) capacitor is charged by the current path
through the internal BST diode and external resistors placed on the PCB from each OUT_x pin to ground.
Ideally, PVDD_x is applied after GVDD_x. When GVDD_x and PVDD_x are applied, the TAS5121I is ready for
operation. PWM input signals can then be applied any time during the power-on sequence, but they must be
active and stable before RESET is set high.
Table 1 describes the input conditions and the output states of the device.
Table 1. Input/Output States
INPUTS
OUTPUTS
CONDITION
DESCRIPTION
RESET
PWM_AP
PWM_BP
SHUTDOWN
OUT_A
OUT_B
X
0
Hi-Z
Shutdown
0
X
1
Hi-Z
Reset
1
0
1
GND
1
0
1
PVDD
Normal
1
0
1
GND
PVDD
Normal
1
PVDD
Reserved
After the previously mentioned conditions are met, the device output begins. If PWM_AP is equal to a high and
PMW_BP is equal to a low, the high-side MOSFET in the A half-bridge of the output H-bridge conducts while the
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相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| TAS5121IDKDE4 | 功能描述:音頻放大器 Digital Amplifier Power Stage RoHS:否 制造商:STMicroelectronics 產(chǎn)品:General Purpose Audio Amplifiers 輸出類型:Digital 輸出功率: THD + 噪聲: 工作電源電壓:3.3 V 電源電流: 最大功率耗散: 最大工作溫度: 安裝風格:SMD/SMT 封裝 / 箱體:TQFP-64 封裝:Reel |
| TAS5121IDKDR | 功能描述:音頻放大器 Digital Amplifier Power Stage RoHS:否 制造商:STMicroelectronics 產(chǎn)品:General Purpose Audio Amplifiers 輸出類型:Digital 輸出功率: THD + 噪聲: 工作電源電壓:3.3 V 電源電流: 最大功率耗散: 最大工作溫度: 安裝風格:SMD/SMT 封裝 / 箱體:TQFP-64 封裝:Reel |
| TAS5121IDKDRE4 | 功能描述:音頻放大器 Digital Amplifier Power Stage RoHS:否 制造商:STMicroelectronics 產(chǎn)品:General Purpose Audio Amplifiers 輸出類型:Digital 輸出功率: THD + 噪聲: 工作電源電壓:3.3 V 電源電流: 最大功率耗散: 最大工作溫度: 安裝風格:SMD/SMT 封裝 / 箱體:TQFP-64 封裝:Reel |
| TAS5122 | 制造商:TI 制造商全稱:Texas Instruments 功能描述:30W STEREO DIGITAL AMPLIFIER POWER STAGE |
| TAS5122_07 | 制造商:TI 制造商全稱:Texas Instruments 功能描述:30-W STEREO DIGITAL AMPLIFIER POWER STAGE |
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