參數(shù)資料
型號: TAS5110ADADG4
廠商: TEXAS INSTRUMENTS INC
元件分類: 音頻/視頻放大
英文描述: 50 W, 2 CHANNEL, AUDIO AMPLIFIER, PDSO32
封裝: GREEN, PLASTIC, HTSSOP-32
文件頁數(shù): 18/18頁
文件大?。?/td> 215K
代理商: TAS5110ADADG4
TAS5110A
SLES079A – APRIL 2003 – REVISED MAY 2003
www.ti.com
9
Fault Indicator Usage
The TAS5110A is a self-protecting device that provides device fault reporting, including overtemperature protect,
undervoltage lockout (low regulator voltage), and short-circuit protection. The short circuit protection protects against
short circuits that may occur at the loudspeaker load when configured. The TAS5110A is not recommended for driving
loads less than 6
, because the internal current limit protection might be activated.
An undervoltage lockout signal occurs when an insufficient voltage level is present on the LDROUTA or LDROUTB
pins. During this condition, gate drive levels are not sufficient for driving the power MOSFETs. Normal operation is
resumed when the minimum proper LDROUTA or LDROUTB level is obtained and the low regulator voltage protect
signal is de-asserted. See the control/sense circuitry section for error and warning conditions.
A high-temperature warning signal is asserted on pin ERR0 when the device temperature exceeds 125
°C typical.
If the internal device temperature exceeds 150
°C typical, the overtemperature protect signal is asserted and the
TAS5110A is shut down. The device re-enables once the temperature drops to 125
°C typical. See the control/sense
circuitry section for error and warning conditions.
Detection of an illegal PWM input state or the loss of a clocking PWM input signal causes an illegal PWM input state
signal to be asserted on the ERR1and ERR0 pins and sets the SHUTDOWN pin to the low state.
ABSOLUTE MAXIMUM RATINGS
over operating free-air temperature range unless otherwise noted(1)
UNIT
DVDD to DVSS
–0.3 V to 4.2 V
PWM_AP, PWM_AM, PWM_BP, PWM_BM
–0.3 V to DVDD + 0.3 V
DC supply voltage range
RESET, PWDN
–0.3 V to DVDD + 0.3 V
DC su
ly voltage range
PVDDA1 to PVSS, PVDDB1 to PVSS
–0.3 V to 28 V
PVDDA2 to PVSS, PVDDB2 to PVSS
0.3 V to 27 V
Output DMOS drain-to-source breakdown voltage
28 V
Operating junction temperature range, TJ
–40
°C to 150°C
Storage temperature range, Tstg
–65
°C to 150°C
Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds)
260
°C
(1) Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied.Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
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