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A6
A5
A0 R/W ACK A7
A6
A5
A4
A0 ACK
A6
A5
A0
ACK
Start
Condition
Stop
Condition
Acknowledge
I CDevice Addressand
2
Read/WriteBit
Subaddress
DataByte
D7
D6
D1
D0 ACK
I CDevice Addressand
Read/WriteBit
2
Not
Acknowledge
R/W
A1
RepeatStart
Condition
T0036-03
MULTIPLE-BYTE READ
A6
A0
ACK
Acknowledge
I CDevice Addressand
Read/WriteBit
2
R/W
A6
A0
R/W ACK
A0 ACK
D7
D0
ACK
Start
Condition
Stop
Condition
Acknowledge
LastDataByte
ACK
FirstDataByte
RepeatStart
Condition
Not
Acknowledge
I CDevice Addressand
Read/WriteBit
2
Subaddress
OtherDataBytes
A7
A6
A5
D7
D0 ACK
Acknowledge
D7
D0
T0036-04
COMMAND CHARACTERISTICS
www.ti.com ................................................................................................................................................... SLES131C – FEBRUARY 2005 – REVISED JUNE 2008
memory address to be read. As a result, the read/write bit is set to a 0. After receiving the TAS5086 address and
the read/write bit, the TAS5086 responds with an acknowledge bit. In addition, after sending the internal memory
address byte or bytes, the master device transmits another start condition, followed by the TAS5086 address and
the read/write bit again. This time, the read/write bit is set to 1, indicating a read transfer. After receiving the
TAS5086 and the read/write bit, the TAS5086 again responds with an acknowledge bit. Next, the TAS5086
transmits the data byte from the memory address being read. After receiving the data byte, the master device
transmits a not-acknowledge, followed by a stop condition, to complete the single-byte data read transfer.
Figure 25. Single-Byte Read Transfer
A multiple-byte data read transfer is identical to a single-byte data read transfer, except that multiple data bytes
are transmitted by the TAS5086 to the master device as shown in Figure 26. Except for the last data byte, the
master device responds with an acknowledge bit after receiving each data byte.
Figure 26. Multiple-Byte Read Transfer
The TAS5086 has two groups of I2C commands. One set is commands that are designed specifically to be
operated while audio is streaming and that have built-in mechanisms to prevent noise, clicks, and pops. The
other set does not have this built-in protection.
Commands that are designed to be adjusted while audio is streaming
Master volume
Master mute
Individual channel volume
Individual channel mute
Commands that the system executes without additional processing to prevent noise, clicks, or pops (in a
number of cases this does not produce an audible click and pop)
Serial data interface format
De-emphasis
Sample rate conversion
Input multiplexer
Output multiplexer
Biquads
Downmix
Copyright 2005–2008, Texas Instruments Incorporated
25
Product Folder Link(s): TAS5086
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| TAS5100ADAP | 功能描述:IC AMP AUDIO PWR 30W D 32TSSOP RoHS:是 類別:集成電路 (IC) >> 線性 - 音頻放大器 系列:- 產(chǎn)品培訓(xùn)模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標(biāo)準(zhǔn)包裝:2,500 系列:DirectDrive® 類型:H 類 輸出類型:耳機(jī)，2-通道（立體聲） 在某負(fù)載時(shí)最大輸出功率 x 通道數(shù)量:35mW x 2 @ 16 歐姆 電源電壓:1.62 V ~ 1.98 V 特點(diǎn):I²C，麥克風(fēng)，靜音，短路保護(hù)，音量控制 安裝類型:表面貼裝 供應(yīng)商設(shè)備封裝:25-WLP（2.09x2.09） 封裝/外殼:25-WFBGA，WLCSP 包裝:帶卷 (TR) |
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