參數(shù)資料
型號: TAS5086DBTR
廠商: TEXAS INSTRUMENTS INC
元件分類: 消費(fèi)家電
英文描述: SPECIALTY CONSUMER CIRCUIT, PDSO38
封裝: GREEN, TSSOP-38
文件頁數(shù): 8/47頁
文件大?。?/td> 814K
代理商: TAS5086DBTR
Reset Timing (RESET)
tw(RESET)
Earliest time
that M-State
could be exited
RESET
M-State
tr(DMSTATE) < 200 ns
tr(I2C_ready)
Start system
tr(run)
Determine SCLK rate
and MCLK ratio. Enable via I2C.
T0029-03
Power-Down (PDN) Timing
PDN
M-State
tsu
tp(DMSTATE) < 1 ms
T0030-02
Back-End Error (BKND_ERR)
SLES131C – FEBRUARY 2005 – REVISED JUNE 2008 ................................................................................................................................................... www.ti.com
Control-signal parameters over recommended operating conditions (unless otherwise noted)
PARAMETER
MIN
TYP
MAX
UNIT
tr(DMSTATE)
Time to M-STATE low
370
ns
tw(RESET)
Pulse duration, RESET active
400
None
ns
tr(I2C_ready)
Time to enable I2C
3
ms
tr(run)
Device start-up time
10
ms
NOTE: Because a crystal time base is used, the system determines the CLK rates. Once the data rate and master clock ratio
are determined, the system outputs audio if a master volume command is issued.
Figure 12. Reset Timing
Control-signal parameters over recommended operating conditions (unless otherwise noted). Note that PDN does not clear
I
2C registers.
PARAMETER
MIN
TYP
MAX
UNIT
tp(DMSTATE)
Time to M-STATE low
300
s
Number of MCLKs preceding the release of PDN
5
tsu
Device start-up time
120
ms
Figure 13. Power-Down Timing
Control-signal parameters over recommended operating conditions (unless otherwise noted)
16
Copyright 2005–2008, Texas Instruments Incorporated
Product Folder Link(s): TAS5086
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