參數(shù)資料
型號(hào): TAS5028PAGR
廠商: TEXAS INSTRUMENTS INC
元件分類: 消費(fèi)家電
英文描述: SPECIALTY CONSUMER CIRCUIT, PQFP64
封裝: GREEN, PLASTIC, TQFP-64
文件頁(yè)數(shù): 11/86頁(yè)
文件大?。?/td> 1201K
代理商: TAS5028PAGR
Introduction
11
SLES112 — June 2004
TAS5028
Table 1 - 2. TAS5028 Audio Processing Feature Sets
FEATURE
32 - 96 kHz
8 CHANNEL FEATURE SET
32 - 96 kHz
6 + 2 LINE OUT FEATURE SET
176.4- AND 192-kHz
FEATURE SET
Signal processing
channels
8
6 + 2
3
Pass through channels
N/A
5
Master volume
1 for eight channels
1 for six channels
1 for three channels
Individual channel
volume controls
8
3
Bass and treble tone
controls
Four Bass and Treble tone controls
with
±18 dB range, programmable
corner frequencies, and 2nd order
slopes
L, R and C (Ch 1, 2, and 7)
LS, RS (Ch 3 and 4)
LBS, RBS (Ch 5 and 6)
Sub (Ch 8)
Four Bass and Treble tone controls
with
±18 dB range, programmable
corner frequencies, and 2nd order
slopes
L, R and C (Ch 1, 2, and 7)
LS, RS (Ch 3 and 4)
Sub, (Ch 8)
Line L and R (Ch 5 and 6)
Two Bass and Treble tone controls
with
±18 dB range, programmable
corner frequencies, and 2nd order
slopes
L and R (Ch 1 and 2)
Sub (Ch 8)
Input output
mapping/mixing
Each of the eight signal-processing channels input can be any ratio of the
eight input channels.
Each of the eight outputs can be any ratio of any two processed channels.
Each of the three
signal-processing channels or the
five pass-though channels inputs
can be any ratio of the eight input
channels.
Each of the eight outputs can be
any ratio of any of the three
processed or five bypass
channels.
DC blocking filters
(Implemented in PWM
Section)
Eight channels
Digital de-emphasis
(Implemented in PWM
Section)
Eight channels for 32 kHz, 44.1 kHz,
and 48 kHz
Six channels for 32 kHz, 44.1 kHz,
and 48 kHz
N/A
Number of Coefficient
sets Stored
Three additional coefficient sets can be stored in memory
1.5
TAS5028 DAP Architecture
1.5.1 TAS5028 DAP Architecture Diagrams
Figure 1 - 4 shows the TAS5028 DAP architecture for Fs = 96 kHz. Note the TAS5028 bass management
architecture shown in channels 1, 2, 7, and 8. Note that the I2C registers are shown to help the designer
configure the TAS5028.
Figure 1 - 5 shows the TAS5028 architecture for Fs = 176.4 kHz or Fs = 192 kHz. Note that only channels 1,
2, and 8 contain all the features. Channels 3 - 7 are pass-through except for master volume control.
Figure 1 - 6 shows TAS5028 detailed channel processing. The output mixer is 8X2 for channels 1 - 6 and *X3
for channels 7 and 8.
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