參數(shù)資料
型號(hào): TAS5028APAG
廠商: Texas Instruments, Inc.
英文描述: 8 Channel Digital Audio PWM Processor
中文描述: 8通道數(shù)字音頻PWM處理器
文件頁數(shù): 66/82頁
文件大?。?/td> 1226K
代理商: TAS5028APAG
Serial Control Interface Register Definitions
61
SLES120
September 2004
TAS5028A
I
2
C
SUBADDRESS
TOTAL
BYTES
REGISTER
FIELDS
DESCRIPTION OF CONTENTS
DEFAULT STATE
A_to_ipmix[3]
SDIN1–Left (Ch 1) A to input mixer 3 coefficient (default = 0)
U (31:28), A_3 (27:24), A_3 (23:16), A_3 (15:8), A_3 (7:0)
0x00, 0x00, 0x00, 0x00
B_to_ipmix[3]
SDIN1–Right (Ch 2) B to input mixer 3 coefficient (default = 0)
U (31:28), B_3 (27:24), B_3 (23:16), B_3 (15:8), B_3 (7:0)
0x00, 0x00, 0x00, 0x00
C_to_ipmix[3]
SDIN2–Left (Ch 3) C to input mixer 3 coefficient (default = 1)
U (31:28), C_3 (27:24), C_3 (23:16), C_3 (15:8), C_3 (7:0)
0x00, 0x80, 0x00, 0x00
0x43
32
D_to_ipmix[3]
SDIN2–Right (Ch 4) D to input mixer 3 coefficient (default = 0)
U (31:28), D_3 (27:24), D_3 (23:16), D_3 (15:8), D_3 (7:0)
0x00, 0x00, 0x00, 0x00
E_to_ipmix[3]
SDIN3–Left (Ch 5) E to input mixer 3 coefficient (default = 0)
U (31:28), E_3 (27:24), E_3 (23:16), E_3 (15:8), E_3 (7:0)
0x00, 0x00, 0x00, 0x00
F_to_ipmix[3]
SDIN3–Right (Ch 6) F to input mixer 3 coefficient (default = 0)
U (31:28), F_3 (27:24), F_3 (23:16), F_3 (15:8), F_3 (7:0)
0x00, 0x00, 0x00, 0x00
G_to_ipmix[3]
SDIN4–Left (Ch 7) G to input mixer 3 coefficient (default = 0)
U (31:28), G_3 (27:24), G_3 (23:16), G_3 (15:8), G_3 (7:0)
0x00, 0x00, 0x00, 0x00
H_to_ipmix[3]
SDIN4–Right (Ch 8) H to input mixer 3 coefficient (default = 0)
U (31:28), H_3 (27:24), H_3 (23:16), H_3 (15:8), H_3 (7:0)
0x00, 0x00, 0x00, 0x00
A_to_ipmix[4]
SDIN1–Left (Ch 1) A to input mixer 4 coefficient (default = 0)
U (31:28), A_4 (27:24), A_4 (23:16), A_4 (15:8), A_4 (7:0)
0x00, 0x00, 0x00, 0x00
B_to_ipmix[4]
SDIN1–Right (Ch 2) B to input mixer 4 coefficient (default = 0)
U (31:28), B_4 (27:24), B_4 (23:16), B_4 (15:8), B_4 (7:0)
0x00, 0x00, 0x00, 0x00
C_to_ipmix[4]
SDIN2–Left (Ch 3) C to input mixer 4 coefficient (default = 0)
U (31:28), C_4 (27:24), C_4 (23:16), C_4 (15:8), C_4 (7:0)
0x00, 0x00, 0x00, 0x00
0x44
32
D_to_ipmix[4]
SDIN2–Right (Ch 4) D to input mixer 4 coefficient (default = 1)
U (31:28), D_4 (27:24), D_4 (23:16), D_4 (15:8), D_4 (7:0)
0x00, 0x80, 0x00, 0x00
E_to_ipmix[4]
SDIN3–Left (Ch 5) E to input mixer 4 coefficient (default = 0)
U (31:28), E_4 (27:24), E_4 (23:16), E_4 (15:8), E_4 (7:0)
0x00, 0x00, 0x00, 0x00
F_to_ipmix[4]
SDIN3–Right (Ch 6) F to input mixer 4 coefficient (default = 0)
U (31:28), F_4 (27:24), F_4 (23:16), F_4 (15:8), F_4 (7:0)
0x00, 0x00, 0x00, 0x00
G_to_ipmix[4]
SDIN4–Left (Ch 7) G to input mixer 4 coefficient (default = 0)
U (31:28), G_4 (27:24), G_4 (23:16), G_4 (15:8), G_4 (7:0)
0x00, 0x00, 0x00, 0x00
H_to_ipmix[4]
SDIN4–Right (Ch 8) H to input mixer 4 coefficient (default = 0)
U (31:28), H_4 (27:24), H_4 (23:16), H_4 (15:8), H_4 (7:0)
0x00, 0x00, 0x00, 0x00
A_to_ipmix[5]
SDIN1–Left (Ch 1) A to input mixer 5 coefficient (default = 0)
U (31:28), A_5 (27:24), A_5 (23:16), A_5 (15:8), A_5 (7:0)
0x00, 0x00, 0x00, 0x00
B_to_ipmix[5]
SDIN1–Right (Ch 2) B to input mixer 5 coefficient (default = 0)
U (31:28), B_5 (27:24), B_5 (23:16), B_5 (15:8), B_5 (7:0)
0x00, 0x00, 0x00, 0x00
C_to_ipmix[5]
SDIN2–Left (Ch 3) C to input mixer 5 coefficient (default = 0)
U (31:28), C_5 (27:24), C_5 (23:16), C_5 (15:8), C_5 (7:0)
0x00, 0x00, 0x00, 0x00
0x45
32
D_to_ipmix[5]
SDIN2–Right (Ch 4) D to input mixer 5 coefficient (default = 0)
U (31:28), D_5 (27:24), D_5 (23:16), D_5 (15:8), D_5 (7:0)
0x00, 0x00, 0x00, 0x00
E_to_ipmix[5]
SDIN3–Left (Ch 5) E to input mixer 5 coefficient (default = 1)
U (31:28), E_5 (27:24), E_5 (23:16), E_5 (15:8), E_5 (7:0)
0x00, 0x80, 0x00, 0x00
F_to_ipmix[5]
SDIN3–Right (Ch 6) F to input mixer 5 coefficient (default = 0)
U (31:28), F_5 (27:24), F_5 (23:16), F_5 (15:8), F_5 (7:0)
0x00, 0x00, 0x00, 0x00
G_to_ipmix[5]
SDIN4–Left (Ch 7) G to input mixer 5 coefficient (default = 0)
U (31:28), G_5 (27:24), G_5 (23:16), G_5 (15:8), G_5 (7:0)
0x00, 0x00, 0x00, 0x00
H_to_ipmix[5]
SDIN4–Right (Ch 8) H to input mixer 5 coefficient (default = 0)
U (31:28), H_5 (27:24), H_5 (23:16), H_5 (15:8), H_5 (7:0)
0x00, 0x00, 0x00, 0x00
相關(guān)PDF資料
PDF描述
TAS5028APAGG4 8 Channel Digital Audio PWM Processor
TAS5028APAGR 8 Channel Digital Audio PWM Processor
TAS5028APAGRG4 8 Channel Digital Audio PWM Processor
TAS5028PAGR 8 Channel Digital Audio PWM Processor
TAS5028PAGRG4 8 Channel Digital Audio PWM Processor
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