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參數(shù)資料
| 型號： | TA1241ANG |
| 廠商： | Toshiba Corporation |
| 英文描述： | DEFLECTION PROCESSOR IC FOR TVs |
| 中文描述： | 偏轉處理器IC為電視 |
| 文件頁數(shù)： | 8/30頁 |
| 文件大?。?/td> | 1108K |
| 代理商： | TA1241ANG |
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TA1241ANG
2005-08-18
8
I
2
C BUS MAP
Write data map
IC address : 10001100 (8CH)
FUNCTION
SUB ADDRESS
MSB
LSB
DATA
MSB
LSB
PRESET
MSB
LSB
RANGE
PICTURE HEIGHT
0 0 0 0 0 0 0 0 × O O O O O O O 0 1 0 0
0 0 0 0
48~+48%
V-LINIARITY
0 0 0 0 0 0 0 1 × × × O O O O O 0 0 0 1
0 0 0 0
13~+13%
V-S CORRECTION
0 0 0 0 0 0 1 0 × × O O O O O O 0 0 1 0
0 0 0 0
24~+24%
V-SHIFT. AGC, REG
0 0 0 0 0 0 1 1 × v × A × O O × 0 0 0 0
0 0 1 0
570~+570 mV
v-COMPENSATION
0 0 0 0 0 1 0 0 × × × × × O O O 0 0 0 0
0 0 0 0
0~9%
PICTURE WIDTH
0 0 0 0 0 1 0 1 × × O O O O O O 0 0 1 0
0 0 0 0
1.7~6.5 V
E-W PARABORA
0 0 0 0 0 1 1 0 × × O O O O O O 0 0 0 0
0 0 0 0
0~4.4 V
E-W CORNER
0 0 0 0 0 1 1 1 × × × O O O O O 0 0 0 1
0 0 0 0
3.2~+3.2%
TRAPEZIUM
0 0 0 0 1 0 0 0 × O O O O O O O 0 1 0 0
0 0 0 0
0~2.4 V
H-COMP, H-CENT DAC
0 0 0 0 1 0 0 1
× O O O × O O O
0 0 0 0
0 0 0 0
0~9%, 1~5 V
V-
∫
CORRECT, BLK-SW
0 0 0 0 1 0 1 0 × × B × O O O O 0 0 0 0
0 0 0 0
0~4%
V CENT DAC
0 0 0 0 1 0 1 1 × O O O O O O O 0 0 0 0
0 0 0 0
0.5~5 V
ANAROG BLK-VH
0 0 0 0 1 1 0 0 × × × O O O O O 0 0 0 1
0 0 0 0
640~+640 mV
ANAROG BLK-VL
0 0 0 0 1 1 0 1 × × × O O O O O 0 0 0 1
0 0 0 0
640~+640 mV
CENT PAR, SAW
0 0 0 0 1 1 1 0 × O O O × O O O 0 1 0 0
0 1 0 0
4~+4 V,
2~+2 V
DYNAMIC FORCUS
0 0 0 0 1 1 1 1 × × O O O O O O 0 0 0 0
0 0 0 0
0.5~5 V
Note:
O :
A :
V :
B :
When the uppermost bit of the subaddress is high, auto-increment mode is set.
Used bit, × : Unused bit
AGC switching (DATA = 0…HIGH response, DATA = 1…LOW response)
Power supply switching
(DATA = 0…Stabilization power supply, DATA = 1…External power supply)
Blanking switch (DATA = 0…Enabled, DATA = 1…Disabled)
Read data map
IC address 10001101 (8DH)
MSB
LSB
FUNCTION
DATA
NON
NON
NON
LVP
V-GUAD
E-Wout
Vout
POW
DISCRIMI-
NATION
0
―
―
―
OFF
OFF
No signal
No signal
OFF
1
―
―
―
ON
ON
Signal
Signal
ON
H
-
CENT DAC
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