參數(shù)資料
| 型號： | T89C51CC01UA-SLSIM |
| 廠商： | Atmel |
| 文件頁數(shù)： | 17/123頁 |
| 文件大小： | 0K |
| 描述： | IC 8051 MCU FLASH 32K 44PLCC |
| 標準包裝： | 27 |
| 系列： | AT89C CAN |
| 核心處理器： | 8051 |
| 芯體尺寸： | 8-位 |
| 速度： | 40MHz |
| 連通性： | CAN，UART/USART |
| 外圍設備： | POR，PWM，WDT |
| 輸入/輸出數(shù)： | 32 |
| 程序存儲器容量： | 32KB（32K x 8） |
| 程序存儲器類型： | 閃存 |
| EEPROM 大?。?/td> | 2K x 8 |
| RAM 容量： | 1.25K x 8 |
| 電壓 - 電源 (Vcc/Vdd)： | 3 V ~ 5.5 V |
| 數(shù)據(jù)轉換器： | A/D 8x10b |
| 振蕩器型： | 外部 |
| 工作溫度： | -40°C ~ 85°C |
| 封裝/外殼： | 44-LCC（J 形引線） |
| 包裝： | 管件 |
| 配用： | AT89STK-06-ND - KIT DEMOBOARD 8051 MCU W/CAN |
| 其它名稱： | T89C51CC01UASLSIM |
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2010 Microchip Technology Inc.
DS41303G-page 113
PIC18F2XK20/4XK20
REGISTER 9-5:
PIR2: PERIPHERAL INTERRUPT REQUEST (FLAG) REGISTER 2
R/W-0
OSCFIF
C1IF
C2IF
EEIF
BCLIF
HLVDIF
TMR3IF
CCP2IF
bit 7
bit 0
Legend:
R = Readable bit
W = Writable bit
U = Unimplemented bit, read as ‘0’
-n = Value at POR
‘1’ = Bit is set
‘0’ = Bit is cleared
x = Bit is unknown
bit 7
OSCFIF: Oscillator Fail Interrupt Flag bit
1
= Device oscillator failed, clock input has changed to HFINTOSC (must be cleared by software)
0
= Device clock operating
bit 6
C1IF: Comparator C1 Interrupt Flag bit
1
= Comparator C1 output has changed (must be cleared by software)
0
= Comparator C1 output has not changed
bit 5
C2IF: Comparator C2 Interrupt Flag bit
1
= Comparator C2 output has changed (must be cleared by software)
0
= Comparator C2 output has not changed
bit 4
EEIF: Data EEPROM/Flash Write Operation Interrupt Flag bit
1
= The write operation is complete (must be cleared by software)
0
= The write operation is not complete or has not been started
bit 3
BCLIF: Bus Collision Interrupt Flag bit
1
= A bus collision occurred (must be cleared by software)
0
= No bus collision occurred
bit 2
HLVDIF: Low-Voltage Detect Interrupt Flag bit
1
= A low-voltage condition occurred (direction determined by the VDIRMAG bit of the
HLVDCON register)
0
= A low-voltage condition has not occurred
bit 1
TMR3IF: TMR3 Overflow Interrupt Flag bit
1
= TMR3 register overflowed (must be cleared by software)
0
= TMR3 register did not overflow
bit 0
CCP2IF: CCP2 Interrupt Flag bit
Capture mode:
1
= A TMR1 register capture occurred (must be cleared by software)
0
= No TMR1 register capture occurred
Compare mode:
1
= A TMR1 register compare match occurred (must be cleared by software)
0
= No TMR1 register compare match occurred
PWM mode:
Unused in this mode.
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