1. Operating ICC is measured with all output p" />
參數(shù)資料
型號: T89C51AC2-RLTIM
廠商: Atmel
文件頁數(shù): 5/121頁
文件大?。?/td> 0K
描述: IC 8051 MCU FLASH 32K 44VQFP
標準包裝: 160
系列: 89C
核心處理器: 8051
芯體尺寸: 8-位
速度: 40MHz
連通性: UART/USART
外圍設備: POR,PWM,WDT
輸入/輸出數(shù): 34
程序存儲器容量: 32KB(32K x 8)
程序存儲器類型: 閃存
EEPROM 大?。?/td> 2K x 8
RAM 容量: 1.25K x 8
電壓 - 電源 (Vcc/Vdd): 3 V ~ 5.5 V
數(shù)據(jù)轉換器: A/D 8x10b
振蕩器型: 外部
工作溫度: -40°C ~ 85°C
封裝/外殼: 44-LQFP
包裝: 托盤
102
A/T89C51AC2
4127H–8051–02/08
Notes:
1. Operating ICC is measured with all output pins disconnected; XTAL1 driven with
TCLCH, TCHCL = 5 ns (see Figure 53.), VIL = VSS + 0.5V,
VIH = VCC - 0.5V; XTAL2 N.C.; EA = RST = Port 0 = VCC. ICC would be slightly higher
if a crystal oscillator used (see Figure 50.).
2. Idle ICC is measured with all output pins disconnected; XTAL1 driven with TCLCH,
TCHCL = 5 ns, VIL = VSS + 0.5V, VIH = VCC - 0.5V; XTAL2 N.C; Port 0 = VCC; EA = RST
= VSS (see Figure 51.).
3. Power-down ICC is measured with all output pins disconnected; EA = VCC, PORT 0 =
VCC; XTAL2 NC.; RST = VSS (see Figure 52.). In addition, the WDT must be inactive
and the POF flag must be set.
4. Capacitance loading on Ports 0 and 2 may cause spurious noise pulses to be super-
imposed on the VOLs of ALE and Ports 1 and 3. The noise is due to external bus
capacitance discharging into the Port 0 and Port 2 pins when these pins make 1 to 0
transitions during bus operation. In the worst cases (capacitive loading 100pF), the
noise pulse on the ALE line may exceed 0.45V with maxi VOL peak 0.6V. A Schmitt
Trigger use is not necessary.
5. Typicals are based on a limited number of samples and are not guaranteed. The val-
ues listed are at room temperature.
6. Under steady state (non-transient) conditions, IOL must be externally limited as fol-
lows:
Maximum IOL per port pin: 10 mA
Maximum IOL per 8-bit port:
Port 0: 26 mA
Ports 1, 2 and 3: 15 mA
Maximum total IOL for all output pins: 71 mA
If IOL exceeds the test condition, VOL may exceed the related specification. Pins are
not guaranteed to sink current greater than the listed test conditions.
7. ICC_FLASH_WRITE operating current while a Flash block write is on going.
Figure 50. ICC Test Condition, Active Mode
EA
VCC
ICC
(NC)
CLOCK
SIGNAL
V
CC
All other pins are disconnected.
RST
XTAL2
XTAL1
V
SS
V
CC
P0
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