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參數(shù)資料
| 型號： | T81L0006B |
| 廠商： | TM Technology, Inc. |
| 英文描述： | 8-bit A/D Type MCU |
| 中文描述： | 8位A / D型微控制器 |
| 文件頁數(shù)： | 9/23頁 |
| 文件大?。?/td> | 167K |
| 代理商： | T81L0006B |
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CH
tm
Multiprocessor Communications
Modes 2 and 3 have a special provision for multiprocessor communications. In these modes, 9 data bits are received.
The 9
th
one goes into RB8. Then comes a stop bit. The port can be programmed such that when the stop bit is received, the
serial port interrupt will be activated only if RB8 = ‘1’. This feature is enabled by setting bit SM2 in SCON. A way to use
this feature in multiprocessor systems is as follows: When the master processor wants to transmit a block of data to one of
several slaves, it first sends out an address byte which identifies the target slave. An address byte differs from a data byte in
that the 9th bit is ‘1’ in an address byte and ‘0’ in a data byte. With SM2 = ‘1’, no slave will be interrupted by a data byte. An
address byte, however, will interrupt all slaves, so that each slave can examine the received byte and see if it is being
addressed. The addressed slave will clear its SM2 bit and prepare to receive the data bytes that will be coming. The slaves
that weren’t being addressed leave their SM2s set and go on about their business, ignoring the coming data bytes.
SM2 has no effect in Mode 0, in Mode 1 can be used to check the validity of the stop bit. In Mode 1 reception, if
SM2 = ‘1’, the receive interrupt will not active unless a valid stop bit is received.
Serial Port Control Register
The serial port control and status register is the Special Function Register SCON, shown in Figure 11. This register
contains not only the mode selection bits, but also the 9th data bit for transmit and receive (TB8 and RB8), and the serial port
interrupt bits (TI and RI).
Baud Rates
The baud rate in Mode 0 is fixed: Mode 0 Baud Rate = Oscillator Frequency / 12. The baud rate in Mode 2 depends on
the value of bit SMOD in Special Function Register PCON. If SMOD = ‘0’ (which is the value on reset), the baud rate is 1/64
the oscillator frequency. If SMOD = ‘1’, the baud rate is 1/32 the oscillator frequency.
Mode 2 Baud Rate =2
SMOD
/64* (Oscillator Frequency)
In the T81L0006A/B, the baud rates in Modes 1 and 3 are determined by the Timer 1 overflow rate.
SCON
MSB
SM0
SM1
SM2
REN
TB8
Where SM0, SM1 specify the serial port mode, as follows:
SM0 SM1
Mode
Description
Baud Rate
0
0
0
shift register
f
OSC
/ 12
0
1
1
8-bit UART
Variable
1
0
2
9-bit UART
UART F
OSC
/64 or F
OSC
/32
1
1
3
9-bit UART
Variable
Using Timer 1 to Generate Baud Rates
When Timer 1 is used as the baud rate generator, the baud rates in Modes 1 and 3 are determined by the Timer 1 overflow
rate and the value of SMOD as follows:
Mode 1, 3 Baud Rate =2
SMOD
/32* (Timer 1 Overflow Rate)
The Timer 1 interrupt should be disabled in this application. The Timer 1 itself can be configured for either “timer” or
“counter” operation, and in any of its 3 running modes. In the most typical applications, it is configured for “timer” operation,
in the auto-reload mode (high nibble of TMOD = 0010B). In that case the baud rate is given by the formula:
Mode 1, 3 Baud Rate =2
SMOD
*(Oscillator Frequency)/ 32/12 / [256 _ (TH1)]
One can achieve very low baud rates with Timer 1 by leaving the Timer 1 interrupt enabled, and configuring the Timer to run
as a 16-bit timer (high nibble of TMOD = 0001B), and using the Timer 1 interrupt to do a 16-bit software reload.
Using Timer 2 to Generate Baud Rates
Timer2 is selected as the baudrate generator by setting TCLK and/or RCLK in T2CON register as followed.
T2CON (
address :
C8h)
MSB
TF2
EXF2
RCLK
TCLK
T2CON.7: TF2 Timer2 overflow flag set by timer2 overflow and must be cleared by software. TF2 will not be set when
either RCLK=1 or TCLK=1.
T2CON.6: EXF2 Timer 2 external flag set when either a capture or reload is caused by a negative transition on T2EX and
EXEN2=1. when timer2 interrupt is enabled, EXF2=1 will cause the CPU to vector to the timer2 interrupt routine. EXF2
must be cleared by software.
T2CON.5: RCLK Receive clock flag. When set, cause the serial port to use timer2 overflow pulses for its receive clock in
T81L0006A/B
TM Technology Inc. reserves the right
P. 9
Publication Date: JAN. 2006
to change products or specifications without notice. Revsion : C
LSB
RI
RB8
TI
LSB
CP/RL2
EXEN2
TR2
C/T2
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