參數(shù)資料
型號(hào)： T6963CFG
廠商： Toshiba Corporation
英文描述： DOT MATRIX LCD CONTROLLER LSI
中文描述： 點(diǎn)陣LCD控制器芯片
文件頁數(shù)： 4/47頁
文件大?。?/td> 835K
代理商： T6963CFG
T6963CFG
2007-05-15
4
Pin Name
I / O
Functions
C / D
Input
WR
= L ······ C / D = H: Command Write
C / D = L: Data Write
RD = L ······ C / D = H: Status Read
C / D = L: Data Read
HALT
Input
H ······ Normal, L ······ Stops the oscillation of the clock
RESET
Input
H ······ Normal (T6963CFG has internal pull
up resistor)
L ······ nitialize T6963CFG. Text and graphic have addresses and text and graphic area settings are
retained.
DSPON
Output
Control pin for external DC / DC. DSPON is L when
HALT
is L or RESET is L.
(When DSPON goes H, the column drivers are cleared.)
DUAL
Input
H ······ Single
Scan
L ······ Dual
Scan
DUAL
H
H
L
L
SDSEL
H
L
H
L
H ······ Sending data by odd / even separation
L ······ Sending data by simple serial method
SDSEL
Input
Upper screen
HOD, ED
ED
HOD, ED
ED
Lower screen
―
―
LOD, ED
ED
ce0
(LOD)
Output
ce0 at DUAL = H Chip enable pin for display memory in the address range 0000H to 07FFH
LOD at DUAL = L Serial data output for odd columns in lower area of LCD
ce1
(LSCP)
Output
ce1
at
DUAL
= H Chip enable pin for display memory in the address range 0800H to 0FFFH
LSCP at DUAL = L Shift clock pulse output for column drivers in lower area of LCD
ce
Output
Chip enable pin for display memory of any address
d0 to d7
I / O
Data I / O pins for display memory
ad0 to ad15
Output
Address outputs for display memory
(ad15 = L: for upper area of LCD, ad15 = H: for lower area of LCD)
R / W
Output
Read / Write signal for display memory
ED
Output
SDSEL
= H: Data output for even columns in both upper and lower areas of LCD
SDSEL = L: Data output for columns in both upper and lower areas of LCD
HOD
Output
Data output for odd columns in upper area of LCD
CDATA
Output
Synchronous signal for row driver
HSCP
Output
Shift clock pulse for column driver of upper area of LCD
LP
Output
Latch pulse for column driver. Shift clock pulse for row driver
FR
Output
Frame signal
XI
Input
Crystal oscillator input
XO
Output
Crystal oscillator output
CH1, CH2
Output
Check signal
T1
,
T2
Input
Test input. Usually open
V
DD
―
Power supply (5.0 V)
V
SS
―
Power supply (0 V)
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