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參數(shù)資料
| 型號： | T436432B-55SG |
| 廠商： | TM Technology, Inc. |
| 英文描述： | 2M x 32 SDRAM 512K x 32bit x 4Banks Synchronous DRAM |
| 中文描述： | 200萬× 32內(nèi)存為512k × 32 x 4Banks同步DRAM |
| 文件頁數(shù)： | 13/72頁 |
| 文件大小： | 731K |
| 代理商： | T436432B-55SG |
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TE
CH
tm
T436432B
TM Technology Inc. reserves the right
P. 13
to change products or specifications without notice.
Publication Date: FEB. 2007
Revision: A
The Burst Type can be one of two modes, Interleave Mode or Sequential Mode.
Burst Type Field (A3)
A3
0
1
Burst Type
Sequential
Interleave
--- Addressing Sequence of Sequential Mode
An internal column address is performed by increasing the address from the column address which is input to
the device. The internal column address is varied by the Burst Length as shown in the following table. When
the value of column address, (n + m), in the table is larger than 255, only the least significant 8 bits are
effective.
Data n
0
1
2
3
4
5
6
7
-
255
256
257
-
Column Address
n
n+1
n+2
n+3
n+4
n+5
n+6
n+7
-
N+255
n
n+1
-
2 words:
Burst Length
--- Addressing Sequence of Interleave Mode
A column access is started in the input column address and is performed by inverting the address bits in the
sequence shown in the following table.
4 words:
8 words:
Full Page: Column address is repeated until terminated.
Data n
Data 0 A7 A6 A5 A4 A3 A2 A1 A0
Data 1 A7 A6 A5 A4 A3 A2 A1 A0#
Data 2 A7 A6 A5 A4 A3 A2 A1# A0
Data 3 A7 A6 A5 A4 A3 A2 A1# A0#
Data 4 A7 A6 A5 A4 A3 A2# A1 A0
Data 5 A7 A6 A5 A4 A3 A2# A1 A0#
Data 6 A7 A6 A5 A4 A3 A2# A1# A0
Data 7 A7 A6 A5 A4 A3 A2# A1# A0#
Column Address
Burst Length
4 words
8 words
This field specifies the number of clock cycles from the assertion of the Read command to the first read data.
The minimum whole value of CAS# Latency depends on the frequency of CLK. The minimum whole value
satisfying the following formula must be programmed into this field.
t
CAC
(min)
≤
CAS# Latency X t
CK
CAS# Latency Field (A6~A4)
A6
0
0
0
0
1
A5
0
0
1
1
X
A4
0
1
0
1
X
CAS# Latency
Reserved
Reserved
2 clocks
3 clocks
Reserved
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| T436432B-5S | 制造商:TMT 制造商全稱:TMT 功能描述:2M x 32 SDRAM 512K x 32bit x 4Banks Synchronous DRAM |
| T436432B-5SG | 制造商:TMT 制造商全稱:TMT 功能描述:2M x 32 SDRAM 512K x 32bit x 4Banks Synchronous DRAM |
| T436432B-6S | 制造商:TMT 制造商全稱:TMT 功能描述:2M x 32 SDRAM 512K x 32bit x 4Banks Synchronous DRAM |
| T436432B-6SG | 制造商:TMT 制造商全稱:TMT 功能描述:2M x 32 SDRAM 512K x 32bit x 4Banks Synchronous DRAM |
| T436432B-7S | 制造商:TMT 制造商全稱:TMT 功能描述:2M x 32 SDRAM 512K x 32bit x 4Banks Synchronous DRAM |
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