參數(shù)資料
型號(hào): T15L256A
廠商: TM Technology, Inc.
英文描述: 32K X 8 LOW POWER CMOS STATIC RAM
中文描述: 32K的× 8低功耗CMOS靜態(tài)RAM
文件頁(yè)數(shù): 4/10頁(yè)
文件大小: 83K
代理商: T15L256A
TE
CH
tm
AC CHARACTERISTICS
(
Vcc
=3.3V
±
5%, Vss = 0V, Ta = 0 to 70
°
C)
(1) READ CYCLE
T15L256A
Taiwan Memory Technology, Inc. reserves the right
P. 4
to change products or specifications without notice.
Publication Date: APR. 2001
Revision:C
T15M256A-35
MIN.
35
-
-
-
3
0
-
-
3
T15M256A-70
MIN.
70
-
-
-
3
0
-
-
3
PARAMETER
SYM.
MAX.
-
35
35
25
-
-
25
25
-
MAX.
-
70
70
35
-
-
35
35
-
UNIT
Read Cycle Time
T
RC
T
AA
ns
ns
ns
ns
ns
ns
ns
ns
ns
Address Access Time
Chip Select Access Time
T
ACS
T
AOE
T
CLZ*
T
OLZ
T
CHZ*
T
OHZ
T
OH
Output Enable to Output Valid
Chip Selection to Output in Low Z
Output Enable to Output in Low Z
Chip Deselection to Output in High Z
Output Disable to Output in High Z
Output Hold from Address Change
* These parameters are sampled but not 100% tested.
(2)WRITE CYCLE
T15M256A-35
MIN.
35
30
30
0
25
0
20
0
-
-
0
T15M256A-70
MIN.
70
60
60
0
50
0
30
0
-
-
0
PARAMETER
SYM.
MAX.
-
-
-
-
-
-
-
-
10
10
-
MAX.
-
-
-
-
-
-
-
-
25
25
-
UNIT
Write Cycle Time
T
WC
T
CW
T
AW
T
AS
T
WP
T
WR
T
DW
T
DH
T
WHZ
T
OHZ
T
OW
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
Chip Selection to End of Write
Address Valid to End of Write
Address Setup Time
Write Pulse Width
Write Recovery Time
Data Valid to End of Write
Data Hold from End of Write
Write to Output in High Z
Output Disable to Output in High Z
Output Active from End of Write
* These parameters are sampled but not 100% tested.
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