參數(shù)資料
型號(hào): T14M1024A-10J
廠商: TM Technology, Inc.
英文描述: CAT5 MULTI VIDEO RECVR VIDEO, RS232 & STEREO
中文描述: 128K的乘八高速CMOS靜態(tài)RAM
文件頁數(shù): 7/10頁
文件大小: 74K
代理商: T14M1024A-10J
TE
CH
tm
Notes: 1. During this period, I/O pins are in the output state, so input signals of opposite phase to the
outputs should not be applied.
2. The data output from
D
OUT
are the same as the data written to
D
IN
during the write cycle.
3.
D
OUT
provides the read data for the next address.
4. Transition is measured
±
500 mV from steady state with
C
L
= 5pF. This parameter is
guaranteed but not 100% tested.
T14M1024A
TM Technology Inc. reserves the right
P. 7
to change products or specifications without notice.
Publication Date: SEP. 2002
Revision:E
5. If OE is low during a WE controlled write cycle, the write pulse width must be the larger of
tWP or (tWHZ + tDW) to allow the I/O drivers to turn off and data to be placed on the bus for the
required tDW. If OE is high during a WE controlled write cycle, this requirement does
not apply and the write pulse can be as short as the specified tWP.
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