參數(shù)資料
型號(hào): T14L1024N-10P
廠商: TM Technology, Inc.
英文描述: RGBSPLIT-2 2 CHANNEL
中文描述: 128K的乘八高速CMOS靜態(tài)RAM
文件頁(yè)數(shù): 1/13頁(yè)
文件大小: 87K
代理商: T14L1024N-10P
TE
CH
tm
SRAM
FEATURES
Fast Address Access Times : 10/12/15ns
Single 3.3V ±0.3V power supply
Center power/ground pin configuration
Low Power Consumption : 110/105/100mA
TTL I/O compatible
2.0V data retention mode
Automatic power-down when deselected
Available packages :
- 32-pin 300 mil and 400 mil SOJ
- 32-pin TSOP 8x13.4mm and 8x20mm
- 36-Ball CSP (8x10mm)
PART NUMBER EXAMPLES
PACKAGE SPEED
T14L1024N-10J SOJ 300mil 10ns
T14L1024N-10W SOJ 400 mil
10ns
T14L1024N-10P TSOP 8x13.4mm
10ns
T14L1024N-10H TSOP 8x20mm 10ns
T14L1024N-10C 36-Ball CSP 10ns
T14L1024N
TM Technology Inc. reserves the right
P. 1
to change products or specifications without notice.
Publication Date: APR. 2002
Revision: C
128K X 8 HIGH SPEED
CMOS STATIC RAM
GENERAL DESCRIPTION
The T14L1024N is a one-megabit density, fast
static random access memory organized as
131,072
words by 8 bits. It is designed for
use in high performance
memory applications
such as main memory storage and high speed
communication buffers. Fabricated using high
performance CMOS technology, access times
down to 10ns are achieved.
BLOCK DIAGRAM
PIN DESCRIPTION
SYMBOL
A0 - A16
I/O0 - I/O7
CE
WE
OE
Vcc
Vss
DESCRIPTION
Address Inputs
Data Inputs/Outputs
Chip Select Inputs
Write Enable
Output Enable
Power Supply
Ground
DECODER
A0
.
.
A16
WE
OE
I/O7
Vcc
Vss
DATA I/O
CORE
ARRAY
CE
I/O0
.
.
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