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參數(shù)資料
| 型號： | T0247 |
| 廠商： | International Rectifier |
| 英文描述： | Fit Rate / Equivalent Device Hours |
| 中文描述： | FIT率/等效器件小時 |
| 文件頁數(shù)： | 27/35頁 |
| 文件大?。?/td> | 112K |
| 代理商： | T0247 |
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TEMPERATURE CYCLING (T/C) Unbiased
Conditions
Temperature:
Tmin = - 55°C
Tmax = + 150°C
Unbiased
2000 Cycles
250,500,1000,1500,2000 Nominal
Bias:
Duration:
Test points:
Purpose
Failure Modes
Sensitive Parameters
I
CES,
V
(BR)CES,
R
θ
JC,
V
CE(on)
Temperature Cycling simulates the extremes of thermal stresses which devices will
encounter in the actual circuit applications in combination with potentially extreme
operating ambient temperatures. Some equipment is destined to be used in extreme
environments, and subject to daily temperature cycles.
The primary failure mode for temperature cycling is a thermal fatigue of the silicon / metal
interfaces and metal / metal interfaces. The fatigue results from thermomechanical
stresses due to heating and cooling and will cause electrical or thermal performance to
degrade.
If the degradation occurs at the header / die interface, then the thermal impedance,
R
θ
JC
will begin to increase well before any electrical effect is seen.
If the degradation occurs at the wire bond / die interface or the wire bond / bond post
interface, then on resistance,
V
CE(on)
, will slowly increase or become unstable with time.
The thermal impedance, when measured during this time, may appear to decrease or
change erratically.
The mechanical stresses from the temperature can also propagate fractures in the silicon
when the die is thermally mismatched to the solder / heat sink system. These fractures
will manifest themselves in the form of shorted gates or degraded breakdown
characteristics (
V
(BR)CES
)
IGBT / CoPack
Quarterly Reliability Report
Page 27 of 35
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