參數(shù)資料
型號(hào): T-51513-D104U-FW-A-AB
廠商: Electronic Theatre Controls, Inc.
元件分類: 其它接口
英文描述: TERMINAL
中文描述: IGBT模塊
文件頁(yè)數(shù): 7/19頁(yè)
文件大?。?/td> 164K
代理商: T-51513-D104U-FW-A-AB
T-51513-D104U-FW-A-AB (AB) No. 2002-0186
OPTREX CORPORATION
Page 7/37
5. INTERFACE TIMING
(1) Timing Specifications
ITEM
SYMBOL
MIN.
TYP.
MAX.
UNIT
Frequency
f
CLK
--
25
29
MHz
Period
t
CLK
34.5
40
--
ns
Low Width
t
WCL
12
--
--
ns
DCLK
*1) *4)
High Width
t
WCH
12
--
--
ns
Set up time
t
DS
5
--
--
ns
DATA *1)
(R,G,B,DENA
HD, VD)
Hold time
t
DH
5
--
--
ns
Horizontal Active Time
t
HA
640
640
640
t
CLK
Horizontal Front Porch
t
HFP
10
16
--
t
CLK
Horizontal Back Porch
t
H BP
2
144
--
t
CLK
Vertical Active Time
t
V A
480
480
480
t
H
DENA
*3)
Vertical Front Porch
t
VFP
1
12
--
t
H
Vertical Back Porch
t
V BP
2
33
--
t
H
Frequency
f
H
27
31.6
38
kHz
Period
t
H
26.3
31.6
37.0
μ
s
HD
*2)*4)
Low Width
t
WHL
5
96
--
t
CLK
Frequency
f
V
55
60
70
Hz
Period
t
V
14.3
16.7
18.2
ms
VD
*2)
Low Width
t
WV L
3
--
--
t
H
[Note]
*1) DATA is latched at fall edge of DCLK in this specification.
*2) Polarities of HD and VD are negative in this specification.
*3) DENA (Data Enable) should always be positive polarity as shown in the timing specification.
*4) DCLK should appear during all invalid period, and HD should appear during invalid period of
frame cycle.
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