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參數(shù)資料
| 型號： | SYM53C1000 |
| 廠商： | LSI Corporation |
| 英文描述： | Highly Integrated PCI-Single Channel Ultra160SCSI Controller(高度集成PCI-單通道Ultra160SCSI控制器) |
| 中文描述： | 高度集成的PCI -單通道Ultra160SCSI控制器（高度集成的PCI -單通道Ultra160SCSI控制器） |
| 文件頁數(shù)： | 2/4頁 |
| 文件大?。?/td> | 179K |
| 代理商： | SYM53C1000 |
New Ultra160 SCSI Features
Double transition clocking enables throughput of up to 160 MBps without
increasing the interface clock rate.
Cyclic Redundancy Check (CRC) improves the reliability of SCSI data trans-
mission through enhanced detection of communication errors. CRC provides
extra data protection for marginal cable plants and external devices. CRC is the
best way to ensure data protection during hot plugging. It uses the same proven
CRC algorithm used by FDDI, Ethernet, and Fibre Channel, and detects all
single bit errors, all double bit errors, all odd number of errors, and all burst errors
up to 32 bits long. To provide complete end-to-end protection of the SCSI I/O,
AIP protects all non-data phases, augmenting the CRC feature of Ultra160.
SureLINK domain validation technology detects the configuration of the SCSI
bus and automatically tests and adjusts the SCSI transfer rate to optimize inter-
operability. The SYM53C1000 exceeds Ultra160 by providing not only Basic
(Level 1) and Enhanced (Level 2) domain validation, but adds Margined
(Level 3) domain validation. This enhancement margins LVD drive strength
and clock signal timing characteristics to identify marginal Ultra160 systems.
Hardware/Software Overview
PCI Interface
The host PCI interface complies with PCI Local Bus Specification Revision 2.2,
and implements a 64-bit/66 MHz PCI bus. It is backward compatible with
32-bit/33 MHz buses. Additionally, support for DAC is provided.
The SYM53C1000 complies with PCI Power Management Interface Specification
Revision 1.1 and PC 99, supporting power states D0, D1, D2, D3hot and
D3cold, power management capabilities registers, and programmable values for
PCI Subsystem Vendor ID and Subsystem ID. Extended access cycles (Memory
Read Line, Memory Read Multiple, and Memory Write and Invalidate) are
also supported.
SCSI Processor
The SYM53C1000 supports wide Ultra160 SCSI synchronous transfer rates up to
160 MBps on a LVD SCSI bus. Integrated LVDlink
transceivers support both
LVD and single-ended signals with no external transceivers required. Fast SCSI,
Ultra SCSI, Ultra2 SCSI, and Ultra160 SCSI are all supported by the SYM53C1000.
Symbios SYM53C1000 Controller
Features
Op code (software) and pin compatible
with SYM53C1010
No external memory required
64-bit,33/66 MHz PCI interface
Theoretical 528 MBps zero wait state
transfer rate
64-bit addressing supported through
Dual Address Cycle (DAC)
Compliant with PCI 2.2,PCI Power
Management 1.1 and PC99
Supports Ultra160 SCSI
Double transition clocking for
160 MBps throughput
Cyclic Redundancy Check
Domain validation
Comprehensive SureLINK
domain validation
Basic (Level 1) with inquiry command
Enhanced (Level 2) with read/
write buffer
Margined (Level 3) with margining of
LVD drive strength and programmable
skew test
Asynchronous Information Protection
Covers all non-data,including command,
status and messages
Supports Nextreme RAID
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| SYM53C1010-33 | PCI to Dual Channel Ultra3 SCSI Multifunction Controller(PCI與雙通道Ultra3 SCSI連接的多功能控制器) |
| SYM53C1010R | PCI-Dual Channel Ultra160 SCSI Controller(PCI-雙通道Ultra160 SCSI控制器) |
| SYM53C1010 | PCI-Single Channel Ultra160 SCSI Controller(PCI-單通道Ultra160 SCSI控制器) |
| SYM53C120 | SCSI Bus Expander(SCSI總線擴展器) |
| SYM53C140 | Ultra2 SCSI Bus Expander(Ultra2 SCSI總線擴展器) |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| SYM53C1010 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Interface IC |
| SYM53C141 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Interface IC |
| SYM53C400A | 制造商:SYMBIOS 功能描述: |
| SYM53C770 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:SCSI Bus Interface/Controller |
| SYM53C876E(PBGA) | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:SCSI Bus Interface/Controller |
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