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參數(shù)資料
| 型號(hào)： | SY898535XLKY TR |
| 廠商： | Micrel Inc |
| 文件頁(yè)數(shù)： | 3/7頁(yè) |
| 文件大?。?/td> | 0K |
| 描述： | IC CLOCK BUFFER MUX 2:4 20-TSSOP |
| 標(biāo)準(zhǔn)包裝： | 1 |
| 系列： | Precision Edge® |
| 類型： | 扇出緩沖器（分配），多路復(fù)用器 |
| 電路數(shù)： | 1 |
| 比率 - 輸入:輸出： | 2:4 |
| 差分 - 輸入:輸出： | 無(wú)/是 |
| 輸入： | LVCMOS，LVTTL，晶體 |
| 輸出： | LVPECL |
| 頻率 - 最大： | 235MHz |
| 電源電壓： | 3.135 V ~ 3.465 V |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 20-TSSOP（0.173"，4.40mm 寬） |
| 供應(yīng)商設(shè)備封裝： | 20-TSSOP |
| 包裝： | 標(biāo)準(zhǔn)包裝 |
| 其它名稱： | 576-3944-6 |
Micrel, Inc.
SY898535XL
June 2011
3
M9999-062211-B
hbwhelp@micrel.com
Pin Configuration
20-Pin TSSOP (K4-20-1)
Pin Description
Pin Number
Pin Name
Pin Function
1
VEE
Ground.
2
CLK_EN
Single-Ended Input: This TTL/CMOS input disables and enables the Q0-Q3 outputs. It is
internally connected to a 51k pull-up resistor and will default to a logic HIGH state if left
open. When disabled, Q goes LOW and /Q goes HIGH. CLK_EN being synchronous,
outputs will be enabled/disabled following a rising and a falling edge of the input clock. VTH =
is approximately 1.5V.
3
CLK_SEL
Single-Ended Input: This single-ended TTL/CMOS-compatible input selects the input to the
multiplexer. If HIGH, selects XTAL input. If LOW, it selects CLK input. Note that this input is
internally connected to a 51k pull-down resistor and will default to logic LOW state if left
open. VTH = is approximately 1.5V.
4
CLK
Single-Ended Input: This LVCMOS or LVTTL signal is the input signal to the device. It is
internally connected to a 51k pull-down resistor and will default to a logic LOW state if left
open. This input is selected when CLK_SEL is set to logic LOW.
6, 7
XTAL_IN,
XTAL_OUT
Crystal oscillator interface. XTAL_IN is the input. XTAL_OUT is the output.
5, 8, 9
NC
Unused Pins
10, 13, 18
VCC
Positive Power Supply Pins: Bypass with 0.1F||0.01F low ESR capacitors as close to the
VCC pins as possible.
20, 19
17, 16
15, 14
12, 11
Q0, /Q0
Q1, /Q1
Q2, /Q2
Q3, /Q3
LVPECL Differential Output Pairs: Differential buffered output copies the selected input
signal. The output swing is typically 800mV. Unused output pairs may be left floating with no
impact on jitter. See “Truth Table” below.
or (408) 955-1690
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| SY89853U | 制造商:MICREL 制造商全稱:Micrel Semiconductor 功能描述:Precision Low-Power Dual 2:1 LVPECL MUX with Internal Termination |
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| SY89853UMG | 功能描述:編碼器、解碼器、復(fù)用器和解復(fù)用器 Low Power, Precision Dual 2:1 LVPECL MUX (I Temp, Green) RoHS:否 制造商:Micrel 產(chǎn)品:Multiplexers 邏輯系列:CMOS 位數(shù): 線路數(shù)量（輸入/輸出）:2 / 12 傳播延遲時(shí)間:350 ps, 400 ps 電源電壓-最大:2.625 V, 3.6 V 電源電壓-最小:2.375 V, 3 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:QFN-44 封裝:Tray |
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