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參數(shù)資料
| 型號(hào)： | SY89850UMG TR |
| 廠(chǎng)商： | Micrel Inc |
| 文件頁(yè)數(shù)： | 3/8頁(yè) |
| 文件大小： | 0K |
| 描述： | IC DRVR/RCVR LVPECL PREC 8-MLF |
| 標(biāo)準(zhǔn)包裝： | 1 |
| 系列： | SY89 |
| 邏輯類(lèi)型： | 差分接收器/驅(qū)動(dòng)器 |
| 電源電壓： | 3 V ~ 3.6 V |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類(lèi)型： | 表面貼裝 |
| 封裝/外殼： | 8-VFDFN 裸露焊盤(pán)，8-MLF? |
| 供應(yīng)商設(shè)備封裝： | 8-MLF?（2x2） |
| 包裝： | 標(biāo)準(zhǔn)包裝 |
| 產(chǎn)品目錄頁(yè)面： | 1090 (CN2011-ZH PDF) |
| 其它名稱(chēng)： | 576-2957-6 |
Micrel, Inc.
SY89809L
December 2009
3
M9999-121409-D
hbwhelp@micrel.com or (408) 955-1690
Pin Description
Pin Number
Pin Name
Type
Pin Function
2, 3
HSTL_CLK,
/HSTL_CLK
HSTL Input
Differential input: This HSTL input can be selected by CLK_SEL. If it is not
used, it can be left floating. This produces a LOW at the output. If driven by an
HSTL driver, an external 50 to ground termination is required at the input.
5, 6
LVPECL_CLK,
/LVPECL_CLK
LVPECL
Input
Differential input: This LVPECL input can be selected by CLK_SEL. If it is not
used, it can be left floating. This produces a LOW at the output (internal 75k
pull-downs).
4
CLK_SEL
LVTTL Input
Selected HSTL_CLK input when LOW and LVPECL_CLK output when HIGH.
11k pull-up.
8
OE
LVTTL Input
Single-ended input: This LVTTL input disables and enables the Q0-Q8 output
pairs. It is internally synchronized to prevent glitching of the Q0-Q8 output
pairs. It is internally connected to a 11k pull-up resistor and will default to a
logic HIGH state if left open.
31, 29, 27,
23, 21, 19,
15, 13, 11
Q0 – Q8
HSTL Output
Differential clock outputs from HSTL_CLK when CLK_SEL = LOW and
LVPECL outputs when CLK_SEL = HIGH. HSTL outputs must be terminated
with 50 to GND. Q0-Q8 outputs are static LOW when OE = LOW. Unused
output pairs may be left floating.
30, 28, 26,
22, 20, 18,
14, 12, 10
/Q0 – /Q8
HSTL Output
Differential clock outputs from HSTL_CLK when CLK_SEL = LOW and
LVPECL outputs when CLK_SEL = HIGH. HSTL outputs must be terminated
with 50 to GND. /Q0-/Q8 outputs are static HIGH when OE = LOW. Unused
output pairs may be left floating.
1
VCCI
VCC Core
Power
Core VCC connected to 3.3V supply. Bypass with 0.1F in parallel with 0.01F
low ESR capacitors as close to VCCI pin as possible.
9, 16, 17,
24, 25, 32
VCCO
VCC Output
Power
Output Buffer VCC connected to 1.8V supply. Bypass with 0.1F in parallel
with 0.01F low ESR capacitors as close to VCCO pins as possible. All VCCO
pins should be connected together on the PCB.
7
GND
Ground
Ground.
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| SY89851U | 制造商:MICREL 制造商全稱(chēng):Micrel Semiconductor 功能描述:Low Power, 3GHz, 1:2 LVPECL Fanout |
| SY89851U_10 | 制造商:MICREL 制造商全稱(chēng):Micrel Semiconductor 功能描述:Low Power, 3GHz, 1:2 LVPECL Fanout |
| SY89851UMG | 功能描述:緩沖器和線(xiàn)路驅(qū)動(dòng)器 2.5/3.3V Low Power 1:2 LVPECL Fanout Buffer (I Temp, Green) RoHS:否 制造商:Micrel 輸入線(xiàn)路數(shù)量:1 輸出線(xiàn)路數(shù)量:2 極性:Non-Inverting 電源電壓-最大:+/- 5.5 V 電源電壓-最小:+/- 2.37 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:MSOP-8 封裝:Reel |
| SY89851UMG TR | 功能描述:緩沖器和線(xiàn)路驅(qū)動(dòng)器 2.5/3.3V Low Power 1:2 LVPECL Fanout Buffer (I Temp, Green) RoHS:否 制造商:Micrel 輸入線(xiàn)路數(shù)量:1 輸出線(xiàn)路數(shù)量:2 極性:Non-Inverting 電源電壓-最大:+/- 5.5 V 電源電壓-最小:+/- 2.37 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:MSOP-8 封裝:Reel |
| SY89851UMGTR | 制造商:MICREL 制造商全稱(chēng):Micrel Semiconductor 功能描述:Low Power, 3GHz, 1:2 LVPECL Fanout Buffer/Translator with Internal Termination |
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