V
參數(shù)資料
型號: SY89842UMG
廠商: Micrel Inc
文件頁數(shù): 14/16頁
文件大?。?/td> 0K
描述: IC MUX CML RPE 2:1 PREC 16-MLF
標(biāo)準(zhǔn)包裝: 100
系列: SY89
類型: 多路復(fù)用器
電路: 1 x 2:1
獨(dú)立電路: 1
電壓電源: 單電源
電源電壓: 3 V ~ 3.6 V
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 16-VFQFN 裸露焊盤,16-MLF?
供應(yīng)商設(shè)備封裝: 16-MLF?(3x3)
包裝: 管件
產(chǎn)品目錄頁面: 1090 (CN2011-ZH PDF)
其它名稱: 576-2096-5
SY89842UMG-ND
Micrel, Inc.
SY89842U
March 2005
M9999-030805
hbwhelp@micrel.com or (408) 955-1690
7
AC Electrical Characteristics
(7)
VCC = 2.5V ±5% or 3.3V ±10%; RL = 100
across output pair; T
A = –40°C to + 85°C, unless otherwise stated.
Symbol
Parameter
Condition
Min
Typ
Max
Units
fMAX
Maximum Operating Frequency
Clock
1.5
2.0
GHz
tpd
Differential Propagation Delay
In-to-Q
SEL-to-Q
100mV < VIN
≤ 200mV(8, 9)
440
625
840
ps
200mV < VIN
≤ 800mV(8, 9)
390
550
770
ps
RPE enabled, see Timing Diagram
17
cycles
RPE disabled (VSEL = VCC/2)
530
880
ps
tpd
Tempco
Differential Propagation Delay
Temperature Coefficient
460
fs/
oC
tSKEW
Part-to-Part Skew
Note 10
200
ps
tJITTER
Clock
Random Jitter
Note 11
1
psRMS
Cycle-to-Cycle Jitter
Note 12
1
psRMS
Total Jitter (TJ)
Note 13
10
psPP
Crosstalk-Induced Jitter
Note 14
0.7
psRMS
tr, tf
Output Rise/Fall Time (20% to 80%)
At full output swing.
30
80
ps
Notes:
7. High-frequency AC-parameters are guaranteed by design and characterization.
8. Propagation delay is a function of rise and fall time at IN. See "Typical Operating Characteristics
″ for more details.
9. Propagation delay is measured with input tr, tf
≤ 300ps (20% to 80%) and V
IL
≥ 800mV.
10. Part-to-part skew is defined for two parts with identical power supply voltages at the same temperature and with no skew of the edges at
the respective inputs.
11. Random Jitter is measured with a K28.7 character pattern, measured at <fMAX.
12. Cycle-to-cycle jitter definition: the variation of periods between adjacent cycles, Tn – Tn-1 where T is the time between rising edges of the
output signal.
13. Total Jitter definition: with an ideal clock input of frequency <fMAX, no more than one output edge in 10
12 output edges will deviate by more
than the specified peak-to-peak jitter value.
14. Crosstalk is measured at the output while applying two similar differential clock frequencies that are asynchronous with respect to each
other at the inputs.
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