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參數(shù)資料
| 型號(hào)： | SY89826LHG |
| 廠商： | MICREL INC |
| 元件分類： | 時(shí)鐘及定時(shí) |
| 英文描述： | 89826 SERIES, LOW SKEW CLOCK DRIVER, 22 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PQFP64 |
| 封裝： | LEAD FREE, TQFP-64 |
| 文件頁(yè)數(shù)： | 1/9頁(yè) |
| 文件大?。?/td> | 120K |
| 代理商： | SY89826LHG |
1
Precision Edge
SY89826L
Micrel, Inc.
M9999-110405
hbwhelp@micrel.com or (408) 955-1690
DESCRIPTION
s High-performance, 1GHz LVDS fanout buffer/
translator
s 22 differential LVDS output pairs
s Guaranteed AC parameters over temperature and
voltage:
> 1GHz fMAX
< 50ps within device skew
< 400ps tr /tf time
s Low jitter performance
< 1ps (rms) cycle-to-cycle jitter
< 1ps (pk-pk) total jitter
s 2:1 mux input accepts LVDS and LVPECL
3.3V supply voltage
s LVDS input includes internal 100
termination
s Output enable function
s Available in a 64-Pin EPAD-TQFP
FEATURES
3.3V 1GHz PRECISION 1:22 LVDS
FANOUT BUFFER/TRANSLATOR
WITH 2:1 INPUT MUX
Precision Edge
SY89826L
APPLICATIONS
s Enterprise networking
s High-end servers
s Communications
1
Rev.: C
Amendment: /0
Issue Date:
October 2005
The SY89826L is a precision fanout buffer with 22
differential LVDS (Low Voltage Differential Swing) output
pairs. The part is designed for use in low voltage 3.3V
applications that require a large number of outputs to drive
precisely aligned, ultra low-skew signals to their destination.
The input is multiplexed from either LVDS or LVPECL (Low
Voltage Positive Emitter Coupled Logic) by the CLK_SEL
pin. The OE (Output Enable) is synchronous so that the
outputs will only be enabled/disabled when they are already
in the LOW state. This avoids any chance of generating a
runt clock pulse when the device is enabled/disabled as
can happen with an asynchronous control.
The SY89826L features a low pin-to-pin skew of less
than 50ps—performance previously unachievable in a
standard product having such a high number of outputs.
The SY89826L is available in a single space saving package,
enabling a lower overall cost solution.
OE(1)
CLK_SEL
Q0 – Q21
/Q0 – /Q21
0
LOW
HIGH
0
1
LOW
HIGH
1
0
LVDS_CLK
/LVDS_CLK
1
LVPECL_CLK
/LVPECL_CLK
TRUTH TABLE
NOTE:
1. The OE (output enable) signal is synchronized with the low level of the
LVDS_CLK and LVPECL_CLK signal.
FUNCTIONAL BLOCK DIAGRAM
CLK_SEL
LVPECL_CLK
/LVPECL_CLK
OE
0
1
22
Q0 - Q21
/Q0 - /Q21
LEN
D
Q
LVDS_CLK
/LVDS_CLK
100
internal input
termination
22 LVDS compatible
outputs
Precision Edge is a registered trademark of Micrel, Inc.
Precision Edge
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| SY89826LHI | 功能描述:IC CLK BUF MUX TRNSL 2:22 64TQFP RoHS:否 類別:集成電路 (IC) >> 時(shí)鐘/計(jì)時(shí) - 時(shí)鐘緩沖器，驅(qū)動(dòng)器 系列:Precision Edge® 標(biāo)準(zhǔn)包裝:1 系列:HiPerClockS™ 類型:扇出緩沖器（分配），多路復(fù)用器 電路數(shù):1 比率 - 輸入:輸出:2:18 差分 - 輸入:輸出:是/無(wú) 輸入:CML，LVCMOS，LVPECL，LVTTL，SSTL 輸出:LVCMOS，LVTTL 頻率 - 最大:250MHz 電源電壓:2.375 V ~ 3.465 V 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:32-LQFP 供應(yīng)商設(shè)備封裝:32-TQFP（7x7） 包裝:- 其它名稱:800-1923-6 |
| SY89826LHITR | 制造商:MICREL 制造商全稱:Micrel Semiconductor 功能描述:3.3V 1GHz PRECISION 1:22 LVDS FANOUT BUFFER/TRANSLATOR WITH 2:1 INPUT MUX |
| SY89826LHY | 功能描述:時(shí)鐘合成器/抖動(dòng)清除器 3.3V 1:22 LVDS Fanout/Translator (I Temp, Lead Free) RoHS:否 制造商:Skyworks Solutions, Inc. 輸出端數(shù)量: 輸出電平: 最大輸出頻率: 輸入電平: 最大輸入頻率:6.1 GHz 電源電壓-最大:3.3 V 電源電壓-最小:2.7 V 封裝 / 箱體:TSSOP-28 封裝:Reel |
| SY89826LHY TR | 功能描述:時(shí)鐘合成器/抖動(dòng)清除器 3.3V 1:22 LVDS Fanout/Translator (I Temp, Lead Free) RoHS:否 制造商:Skyworks Solutions, Inc. 輸出端數(shù)量: 輸出電平: 最大輸出頻率: 輸入電平: 最大輸入頻率:6.1 GHz 電源電壓-最大:3.3 V 電源電壓-最小:2.7 V 封裝 / 箱體:TSSOP-28 封裝:Reel |
| SY89826LHYTR | 制造商:MICREL 制造商全稱:Micrel Semiconductor 功能描述:3.3V 1GHz PRECISION 1:22 LVDS FANOUT BUFFER/TRANSLATOR WITH 2:1 INPUT MUX |
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