Precision Edge SY89547L Micrel, Inc. M9999-091809 hbwhelp@micrel.com or (408) 955-1690
參數(shù)資料
型號: SY89547LMG TR
廠商: Micrel Inc
文件頁數(shù): 7/11頁
文件大?。?/td> 0K
描述: IC MUX 4:1 LVDS DIFF 3.3V 32-MLF
標(biāo)準(zhǔn)包裝: 1,000
系列: SY89
類型: 多路復(fù)用器
電路: 1 x 4:1
獨(dú)立電路: 1
電壓電源: 單電源
電源電壓: 3 V ~ 3.6 V
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 32-VFQFN 裸露焊盤,32-MLF?
供應(yīng)商設(shè)備封裝: 32-MLF?(5x5)
包裝: 帶卷 (TR)
其它名稱: SY89547LMGTR
SY89547LMGTR-ND
5
Precision Edge
SY89547L
Micrel, Inc.
M9999-091809
hbwhelp@micrel.com or (408) 955-1690
VCC = 3.3V ±10%; TA = –40°C to +85°C; RL = 100 across Q and /Q, unless otherwise stated.
Symbol
Parameter
Condition
Min
Typ
Max
Units
fMAX
Maximum Operating Frequency
NRZ Data
3.2
Gbps
VOUT ≥ 200mV
Clock
4
GHz
tpd
Differential Propagation Delay
IN-to-Q
340
440
540
ps
SEL-to-Q
200
420
700
ps
tSKEW
Input-to-Input Skew
Note 11
520
ps
Output-to-Output Skew
Note 12
820
ps
Part-to-Part Skew
Note 13
200
ps
tJITTER
Data
Random Jitter (RJ)
Note 14
1psRMS
Deterministic Jitter (DJ)
Note 15
10
ps
PP
Clock
Total Jitter (TJ)
Note 16
10
ps
PP
Cycle-to-Cycle Jitter
Note 17
1psRMS
Crosstalk
Crosstalk-Induced Jitter
Note 18
0.7
psRMS
tR, tF
Output Rise / Fall Time
At full output swing
40
80
150
ps
(20% to 80%)
Notes:
10. Measured with 100mV input swing. See “Timing Diagrams” section for definition of parameters. High frequency AC parameters are guaranteed by
design and characterization.
11. Input-to-input skew is the difference in time from an input-to-output in comparison to any other input-to-output. In addition, the input-to-input skew
does not include the output skew.
12. Output-to-output skew is measured between two different outputs under identical input transitions.
13. Part-to-part skew is defined for two parts with identical power supply voltages at the same temperature and with no skew of the edges at the
respective inputs. Total skew is calculated as the RMS (Root Mean Square) of the input skew and output skew.
14. RJ is measured with a K28.7 comma detect character pattern, measured at 1.25Gbps and 3.2Gbps.
15. DJ is measured at 1.25Gbps and 3.2Gbps, with both K28.5 and 223–1 PRBS pattern.
16. Total jitter definition: with an ideal clock input of frequency
≤f
MAX, no more than one output edge in 10
12 output edges will deviate by more than the
specified peak-to-peak jitter value.
17. Cycle-to-cycle jitter definition: the variation of periods between adjacent cycles, Tn-Tn-1 where T is the time between rising edges of the output
signal.
18. Crosstalk is measured at the output while applying two similar clock frequencies to adjacent inputs that are asynchronous with respect to each other
at the inputs.
AC ELECTRICAL CHARACTERISTICS(10)
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