- 鎮ㄧ従(xi脿n)鍦ㄧ殑浣嶇疆锛�璨疯常IC缍�(w菐ng) > PDF鐩寗9457 > SY89544UMG (Micrel Inc)IC MUX 4:1 LVDS DIFF 2.5V 32MLF PDF璩囨枡涓嬭級
鍙冩暩(sh霉)璩囨枡
| 鍨嬭櫉锛� | SY89544UMG |
| 寤犲晢锛� | Micrel Inc |
| 鏂囦欢闋佹暩(sh霉)锛� | 6/10闋� |
| 鏂囦欢澶�?銆�?/td> | 0K |
| 鎻忚堪锛� | IC MUX 4:1 LVDS DIFF 2.5V 32MLF |
| 妯�(bi膩o)婧�(zh菙n)鍖呰锛� | 60 |
| 绯诲垪锛� | SY89 |
| 椤炲瀷锛� | 澶氳矾寰�(f霉)鐢ㄥ櫒 |
| 闆昏矾锛� | 1 x 4:1 |
| 鐛�(d煤)绔嬮浕璺細 | 1 |
| 闆诲闆绘簮锛� | 鍠浕婧� |
| 闆绘簮闆诲锛� | 3 V ~ 3.6 V |
| 宸ヤ綔婧害锛� | -40°C ~ 85°C |
| 瀹夎椤炲瀷锛� | 琛ㄩ潰璨艰 |
| 灏佽/澶栨锛� | 32-VFQFN 瑁搁湶鐒婄洡锛�32-MLF? |
| 渚涙噳(y墨ng)鍟嗚ō(sh猫)鍌欏皝瑁濓細 | 32-MLF?锛�5x5锛� |
| 鍖呰锛� | 绠′欢 |
| 鐢�(ch菐n)鍝佺洰閷勯爜闈細 | 1090 (CN2011-ZH PDF) |
| 鍏跺畠鍚嶇ū锛� | 576-1425 |
5
Precision Edge
SY89544U
Micrel, Inc.
M9999-082407
hbwhelp@micrel.com or (408) 955-1690
V
CC = 2.5V 卤5%; TA = 鈥�40掳C to +85掳C; RL = 100 across Q and /Q, unless otherwise stated.
Symbol
Parameter
Condition
Min
Typ
Max
Units
f
MAX
Maximum Operating Frequency
NRZ Data
3.2
Gbps
V
OUT 鈮� 200mV
Clock
4
GHz
t
pd
Differential Propagation Delay
IN-to-Q
310
410
510
ps
SEL-to-Q
200
400
700
ps
t
SKEW
Input-to-Input Skew
Note 11
520
ps
Part-to-Part Skew
Note 12
200
ps
t
JITTER
Data
Random Jitter (RJ)
Note 13
1ps
RMS
Deterministic Jitter (DJ)
Note 14
10
psPP
Clock
Total Jitter (TJ)
Note 15
10
psPP
Cycle-to-Cycle Jitter
Note 16
1ps
RMS
Crosstalk-Induced Jitter
Note 17
0.7
ps
RMS
Adjacent Channel
t
r, tf
Output Rise/Fall Time
At full output swing.
35
80
150
ps
(20% to 80%)
Notes:
10. Measured with 100mV input swing. See 鈥淭iming Diagrams鈥� section for definition of parameters. High-frequency AC parameters are guaranteed by
design and characterization.
11. Input-to-input skew is the difference in propagation delay between any two inputs to the output under identical conditions.
12. Part-to-part skew is defined for two parts with identical power supply voltages at the same temperature and with no skew of the edges at the
respective inputs.
13. Random jitter is measured with a K28.7 comma detect character pattern, measured at 1.25Gbps and 3.2Gbps.
14. Deterministic jitter is measured at 1.25Gbps and 3.2Gbps, with both K28.5 and 223鈥�1 PRBS pattern.
15. Total jitter definition: with an ideal clock input of frequency 鈮� fMAX, no more than one output edge in 10
12 output edges will deviate by more than the
specified peak-to-peak jitter value.
16. Cycle-to-cycle jitter definition: the variation of periods between adjacent cycles, Tn鈥揟n-1 where T is the time between rising edges of the output
signal.
17. Crosstalk is measured at the output while applying two similar frequencies to adjacent inputs that are asynchronous with respect to each other at the
inputs.
AC ELECTRICAL CHARACTERISTICS(10)
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| NBXHGA053LN1TAG | IC XO LVPECL 50.0000MHZ 6CLCC |
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| NBXHGA019LN1TAG | IC XO LVPECL 125.0000MHZ 6CLCC |
| SY100E154JZ | IC MUX-LATCH 5BIT 2:1 28-PLCC |
| NBXHGA017LN1TAG | IC XO LVPECL 156.2500MHZ 6CLCC |
鐩搁棞(gu膩n)浠ｇ悊鍟�/鎶€琛�(sh霉)鍙冩暩(sh霉) |
鍙冩暩(sh霉)鎻忚堪 |
|---|---|
| SY89544UMG TR | 鍔熻兘鎻忚堪:绶ㄧ⒓鍣�銆佽В纰煎櫒銆佸京(f霉)鐢ㄥ櫒鍜岃В寰�(f霉)鐢ㄥ櫒 2.5V, 3.2Gbps 4:1 LVDS Multiplexer (I Temp, Green) RoHS:鍚� 鍒堕€犲晢:Micrel 鐢�(ch菐n)鍝�:Multiplexers 閭忚集绯诲垪:CMOS 浣嶆暩(sh霉): 绶氳矾鏁�(sh霉)閲忥紙杓稿叆/杓稿嚭锛�:2 / 12 鍌虫挱寤堕伈鏅傞枔:350 ps, 400 ps 闆绘簮闆诲-鏈€澶�:2.625 V, 3.6 V 闆绘簮闆诲-鏈€灏�:2.375 V, 3 V 鏈€澶у伐浣滄韩搴�:+ 85 C 瀹夎棰�(f膿ng)鏍�:SMD/SMT 灏佽 / 绠遍珨:QFN-44 灏佽:Tray |
| SY89544UMGTR | 鍒堕€犲晢:MICREL 鍒堕€犲晢鍏ㄧū:Micrel Semiconductor 鍔熻兘鎻忚堪:2.5V, 3.2Gbps, DIFFERENTIAL 4:1 LVDS MULTIPLEXER WITH INTERNAL INPUT TERMINATION |
| SY89544UMI | 鍔熻兘鎻忚堪:IC MUX 4:1 LVDS DIFF 2.5V 32MLF RoHS:鍚� 椤炲垾:闆嗘垚闆昏矾 (IC) >> 閭忚集 - 淇¤櫉闁嬮棞(gu膩n)锛屽璺京(f霉)鐢ㄥ櫒锛岃В纰煎櫒 绯诲垪:SY89 妯�(bi膩o)婧�(zh菙n)鍖呰:25 绯诲垪:74HC 椤炲瀷:瑙ｇ⒓鍣� 闆昏矾:1 x 2:4 鐛�(d煤)绔嬮浕璺�:2 杓稿嚭闆绘祦楂�锛屼綆:5.2mA锛�5.2mA 闆诲闆绘簮:鍠浕婧� 闆绘簮闆诲:2 V ~ 6 V 宸ヤ綔婧害:-40°C ~ 85°C 瀹夎椤炲瀷:閫氬瓟 灏佽/澶栨:16-DIP锛�0.300"锛�7.62mm锛� 渚涙噳(y墨ng)鍟嗚ō(sh猫)鍌欏皝瑁�:16-DIP 鍖呰:绠′欢 |
| SY89544UMI TR | 鍔熻兘鎻忚堪:IC MUX 4:1 LVDS DIFF 2.5V 32-MLF RoHS:鍚� 椤炲垾:闆嗘垚闆昏矾 (IC) >> 閭忚集 - 淇¤櫉闁嬮棞(gu膩n)锛屽璺京(f霉)鐢ㄥ櫒锛岃В纰煎櫒 绯诲垪:SY89 妯�(bi膩o)婧�(zh菙n)鍖呰:25 绯诲垪:74HC 椤炲瀷:瑙ｇ⒓鍣� 闆昏矾:1 x 2:4 鐛�(d煤)绔嬮浕璺�:2 杓稿嚭闆绘祦楂橈紝浣�:5.2mA锛�5.2mA 闆诲闆绘簮:鍠浕婧� 闆绘簮闆诲:2 V ~ 6 V 宸ヤ綔婧害:-40°C ~ 85°C 瀹夎椤炲瀷:閫氬瓟 灏佽/澶栨:16-DIP锛�0.300"锛�7.62mm锛� 渚涙噳(y墨ng)鍟嗚ō(sh猫)鍌欏皝瑁�:16-DIP 鍖呰:绠′欢 |
| SY89544UMITR | 鍒堕€犲晢:MICREL 鍒堕€犲晢鍏ㄧū:Micrel Semiconductor 鍔熻兘鎻忚堪:2.5V, 3.2Gbps, DIFFERENTIAL 4:1 LVDS MULTIPLEXER WITH INTERNAL INPUT TERMINATION |
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