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參數(shù)資料
| 型號： | SY89544UMG TR |
| 廠商： | Micrel Inc |
| 文件頁數(shù)： | 3/10頁 |
| 文件大小： | 0K |
| 描述： | IC MUX 4:1 LVDS DIFF 2.5V 32-MLF |
| 標(biāo)準(zhǔn)包裝： | 1,000 |
| 系列： | SY89 |
| 類型： | 多路復(fù)用器 |
| 電路： | 1 x 4:1 |
| 獨立電路： | 1 |
| 電壓電源： | 單電源 |
| 電源電壓： | 3 V ~ 3.6 V |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 32-VFQFN 裸露焊盤，32-MLF? |
| 供應(yīng)商設(shè)備封裝： | 32-MLF?（5x5） |
| 包裝： | 帶卷 (TR) |
| 其它名稱： | SY89544UMGTR SY89544UMGTR-ND |
2
Precision Edge
SY89544U
Micrel, Inc.
M9999-082407
hbwhelp@micrel.com or (408) 955-1690
Pin Number
Pin Name
Pin Function
4, 2, 32,
IN0, /IN0,
Differential Inputs: These input pairs are the differential signal inputs to the device. Inputs
30, 27, 25, 23, 21
IN1, /IN1,
accept AC- or DC-coupled signals as small as 100mV. Each pin of a pair internally
IN2, /IN2,
terminates to a VT pin through 50. Note that these inputs will default to an indeterminate
IN3, /IN3
state if left open. Unused differential input pairs can be terminated by connecting one input
to VCC and the complementary input to GND through a 1k resistor. The VT pin is to be
left open in this configuration. Please refer to the “Input Interface Applications” section for
more details.
3, 31, 26, 22
VT0, VT1,
Input Termination Center-Tap: Each side of the differential input pair, terminates to a VT
VT2, VT3
pin. The V
T0, VT1, VT2, VT3 pins provide a center-tap to a termination network for
maximum interface flexibility. See “Input Interface Applications” section for more details.
6, 19
SEL0, SEL1
These single-ended TTL/CMOS compatible inputs select the inputs to the multiplexers.
Note that these inputs are internally connected to a 25k pull-up resistor and will default
to a logic HIGH state if left open. Input switching threshold is VCC/2.
1, 5, 8,
VCC
Positive Power Supply: Bypass with 0.1F||0.01F low ESR capacitors. The 0.01F
17, 20, 24, 28, 29
capacitor should be as close to a V
CC pin as possible.
10, 11
Q, /Q
Differential Outputs: This LVDS output pair is the output of the device. It is a
logic function of the IN0, IN1, IN0, IN1 and SEL0 inputs. Please refer to the “Truth Table’”
for details.
7, 9, 12, 13, 16, 18
GND,
Ground: Ground pin and exposed pad must be connected to the same ground plane.
Exposed pad
14, 15
NC
No connect (unused pins).
PIN DESCRIPTION
PACKAGE/ORDERING INFORMATION
24
23
22
21
20
19
18
17
VCC
IN3
VT3
/IN3
VCC
SEL1
GND
VCC
/IN0
VT0
/IN0
VCC
SEL0
GND
VCC
1
2
3
4
5
6
7
8
910 11 12 13 14 15 16
32 31 30 29 28 27 26 25
VCC
/IN1
VT1
IN1
IN2
VT2
/IN2
GND
/Q
Q
GND
NC
GND
32-Pin MLF
Ordering Information(1)
Package
Operating
Package
Lead
Part Number
Type
Range
Marking
Finish
SY89544UMI
MLF-32
Industrial
SY89544U
Sn-Pb
SY89544UMITR(2)
MLF-32
Industrial
SY89544U
Sn-Pb
SY89544UMG(3)
MLF-32
Industrial
SY89544U with
Pb-Free
Pb-Free bar-line indicator
NiPdAu
SY89544UMGTR(2, 3)
MLF-32
Industrial
SY89544U with
Pb-Free
Pb-Free bar-line indicator
NiPdAu
Notes:
1. Contact factory for die availability. Dice are guaranteed at T
A = 25°C, DC electricals only.
2. Tape and Reel.
3. Recommended for new designs.
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| SY89544UMI | 功能描述:IC MUX 4:1 LVDS DIFF 2.5V 32MLF RoHS:否 類別:集成電路 (IC) >> 邏輯 - 信號開關(guān)，多路復(fù)用器，解碼器 系列:SY89 標(biāo)準(zhǔn)包裝:25 系列:74HC 類型:解碼器 電路:1 x 2:4 獨立電路:2 輸出電流高，低:5.2mA，5.2mA 電壓電源:單電源 電源電壓:2 V ~ 6 V 工作溫度:-40°C ~ 85°C 安裝類型:通孔 封裝/外殼:16-DIP（0.300"，7.62mm） 供應(yīng)商設(shè)備封裝:16-DIP 包裝:管件 |
| SY89544UMI TR | 功能描述:IC MUX 4:1 LVDS DIFF 2.5V 32-MLF RoHS:否 類別:集成電路 (IC) >> 邏輯 - 信號開關(guān)，多路復(fù)用器，解碼器 系列:SY89 標(biāo)準(zhǔn)包裝:25 系列:74HC 類型:解碼器 電路:1 x 2:4 獨立電路:2 輸出電流高，低:5.2mA，5.2mA 電壓電源:單電源 電源電壓:2 V ~ 6 V 工作溫度:-40°C ~ 85°C 安裝類型:通孔 封裝/外殼:16-DIP（0.300"，7.62mm） 供應(yīng)商設(shè)備封裝:16-DIP 包裝:管件 |
| SY89544UMITR | 制造商:MICREL 制造商全稱:Micrel Semiconductor 功能描述:2.5V, 3.2Gbps, DIFFERENTIAL 4:1 LVDS MULTIPLEXER WITH INTERNAL INPUT TERMINATION |
| SY89545L | 制造商:MICREL 制造商全稱:Micrel Semiconductor 功能描述:3.3V, 3.2Gbps DIFFERENTIAL 4:1 LVDS MULTIPLEXER with INTERNAL INPUT TERMINATION |
| SY89545L_08 | 制造商:MICREL 制造商全稱:Micrel Semiconductor 功能描述:3.3V, 3.2Gbps DIFFERENTIAL 4:1 LVDS MULTIPLEXER with INTERNAL INPUT TERMINATION |
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