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參數(shù)資料
| 型號(hào)： | SY89538LHH TR |
| 廠商： | Micrel Inc |
| 文件頁數(shù)： | 8/23頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC SYNTHESIZR LVPECL/LVDS 64TQFP |
| 標(biāo)準(zhǔn)包裝： | 1,000 |
| 系列： | Precision Edge® |
| 類型： | 時(shí)鐘合成器/扇出緩沖器 |
| PLL： | 是 |
| 輸入： | CMOS，HSTL，LVDS，LVPECL，LVTTL，SSTL，晶體 |
| 輸出： | LVDS，LVPECL |
| 電路數(shù)： | 1 |
| 比率 - 輸入:輸出： | 3:7 |
| 差分 - 輸入:輸出： | 是/是 |
| 頻率 - 最大： | 756MHz |
| 除法器/乘法器： | 是/無 |
| 電源電壓： | 2.375 V ~ 3.6 V |
| 工作溫度： | 0°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 64-TQFP 裸露焊盤 |
| 供應(yīng)商設(shè)備封裝： | 64-EP-TQFP |
| 包裝： | 帶卷 (TR) |
| 其它名稱： | SY89538LHHTR SY89538LHHTR-ND |
Micrel, Inc.
SY89538L
January 2008
M9999-010808-E
hbwhelp@micrel.com or (408) 955-1690
16
External Loop Filter Considerations
The SY89538L features an external PLL loop filter
that allows the users to tailor the PLL’s behavior. It is
recommended that ceramic capacitors with NPO or
X7R dielectric be used, since they have very low
effective series resistance. For applications that
require
ultra-low
cycle-to-cycle
jitter,
use
the
components shown in Figure 4. Larger values of the
zero capacitor (capacitor shown in parallel) results in
less cycle-to- cycle jitter, however the total jitter
increases as the value of the zero capacitor
increases. In addition, as the zero capacitor
increases, loop stability decreases as the zero
capacitor begins to dominate over the pole capacitor
(capacitor in series with the damping resistor). The
external loop filter allows the user to change the loop
filter values for specific jitter requirements. Using a
smaller resistor in the loop filter decreases the PLL’s
loop bandwidth. This results in less noise from the
PLL input, but potentially more noise from the VCO.
Take care to keep the loop filter components on the
same side of the board and as close as possible to
the SY89538L’s LR and LF pins. To minimize noise
pick up on the loop filter pins, cut the ground plane
directly underneath the loop filter component pads
and traces. However, the benefit may not be
significant in all applications.
Figure 4. Loop Filter
Power Supply Filtering Techniques
As with any high-speed integrated circuit, power
supply filtering is very important. At a minimum,
VCCA, VCCD, and all VCCO pins should be
individually connected using a via to the power supply
plane, and separate bypass capacitors should be
used for each pin. To achieve optimal jitter
performance, each power supply pin should use
separate instances of the circuit shown in Figure 5.
Figure 5. Recommended
Power Supply Filter
Note:
For VCCA and VCCD use ferrite bead, 200mA, Murata P/N
BLM21A1025.
For VCCO use ferrite bead3A, 0.025 DC, Murata, P/N BLM31P005.
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| SY89538LHY | 功能描述:時(shí)鐘合成器/抖動(dòng)清除器 3.3V LVPECL/LVDS Clock Synthesizer System (I Temp, Lead Free) RoHS:否 制造商:Skyworks Solutions, Inc. 輸出端數(shù)量: 輸出電平: 最大輸出頻率: 輸入電平: 最大輸入頻率:6.1 GHz 電源電壓-最大:3.3 V 電源電壓-最小:2.7 V 封裝 / 箱體:TSSOP-28 封裝:Reel |
| SY89538LHY TR | 功能描述:時(shí)鐘合成器/抖動(dòng)清除器 3.3V LVPECL/LVDS Clock Synthesizer System (I Temp, Lead Free) RoHS:否 制造商:Skyworks Solutions, Inc. 輸出端數(shù)量: 輸出電平: 最大輸出頻率: 輸入電平: 最大輸入頻率:6.1 GHz 電源電壓-最大:3.3 V 電源電壓-最小:2.7 V 封裝 / 箱體:TSSOP-28 封裝:Reel |
| SY89538LHYTR | 制造商:MICREL 制造商全稱:Micrel Semiconductor 功能描述:3.3V, Precision LVPECL and LVDS Programmable Multiple Output Bank Clock Synthesizer |
| SY89538LHZ | 功能描述:時(shí)鐘合成器/抖動(dòng)清除器 3.3V LVPECL/LVDS Clock Synthesizer System (I Temp, Lead Free) RoHS:否 制造商:Skyworks Solutions, Inc. 輸出端數(shù)量: 輸出電平: 最大輸出頻率: 輸入電平: 最大輸入頻率:6.1 GHz 電源電壓-最大:3.3 V 電源電壓-最小:2.7 V 封裝 / 箱體:TSSOP-28 封裝:Reel |
| SY89538LHZ TR | 功能描述:時(shí)鐘合成器/抖動(dòng)清除器 3.3V LVPECL/LVDS Clock Synthesizer System (I Temp, Lead Free) RoHS:否 制造商:Skyworks Solutions, Inc. 輸出端數(shù)量: 輸出電平: 最大輸出頻率: 輸入電平: 最大輸入頻率:6.1 GHz 電源電壓-最大:3.3 V 電源電壓-最小:2.7 V 封裝 / 箱體:TSSOP-28 封裝:Reel |
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