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參數(shù)資料
| 型號(hào)： | SY89537LMH TR |
| 廠商： | Micrel Inc |
| 文件頁數(shù)： | 3/19頁 |
| 文件大小： | 0K |
| 描述： | IC SYNTHESIZR LVPECL/LVDS 44-MLF |
| 標(biāo)準(zhǔn)包裝： | 1,000 |
| 系列： | Precision Edge® |
| 類型： | 時(shí)鐘/頻率合成器 |
| PLL： | 是 |
| 輸入： | CMOS，HSTL，LVDS，LVPECL，LVTTL，SSTL，晶體 |
| 輸出： | LVDS，LVPECL |
| 電路數(shù)： | 1 |
| 比率 - 輸入:輸出： | 3:7 |
| 差分 - 輸入:輸出： | 是/是 |
| 頻率 - 最大： | 756MHz |
| 除法器/乘法器： | 是/無 |
| 電源電壓： | 2.375 V ~ 3.6 V |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 44-VFQFN 裸露焊盤，44-MLF? |
| 供應(yīng)商設(shè)備封裝： | 44-MLF?（7x7） |
| 包裝： | 帶卷 (TR) |
| 其它名稱： | SY89537LMHTR SY89537LMHTR-ND |
Micrel, Inc.
SY89537L
December 2007
M9999-121207-B
hbwhelp@micrel.com or (408) 955-1690
11
Figure 3b. Loop Filter for Lowest Total Jitter and Best
Reference Spur Reduction
The reference spur is located at the phase detector
frequency away from the carrier frequency. The
attenuation of the reference spur is a function of the
loop filter. Figure 4a shows the attenuation of the
reference spur with the loop filter shown in Figure 3a.
Figure 4b shows the attenuation of the reference spur
with the loop filter shown in Figure 3b.
Crystal Frequency: 14MHz to 18MHz
Mode of Oscillation: Fundamental
Min.
Typ.
Max.
Unit
Frequency Tolerance @25°C
±30
±50
ppm
Frequency Stability over 0*C
to 70°C
±50
±100
ppm
Operating Temperature Range
–20
+70
°C
Storage Temperature Range
–55
+125
°C
Aging (per yr/1
st 3yrs)
±5
ppm
Equivalent Series Resistance
(ESR)
50
Drive Level
100
W
Table 4. Quartz Crystal Oscillator Specifications
Figure 4a. Reference Spur at -39dB at 16MHz
(R = 130, C1 = 0.47F, C2 = 100pF)
Figure 4b. Reference Spur at -52dB at 16MHz
(R = 130, C1 = 0.47F, C2 = 1000pF)
Power Supply Filtering Techniques
As with any high-speed integrated circuit, power
supply filtering is very important. At a minimum,
VCCA, VCCD, and all VCCO pins should be
individually connected using a via to the power supply
plane, and separate bypass capacitors should be
used for each pin. To achieve optimal jitter
performance, each power supply pin should use
separate instances of the circuit shown in Figure 5.
Figure 5. SY89537L Recommended
Power Supply De-Coupling
Note:
For VCCA and VCCD use ferrite bead, Murata P/N BLM21A1025.
For VCCO use ferrite bead, Murata, P/N BLM31P005.
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| SY89537LMY | 功能描述:時(shí)鐘合成器/抖動(dòng)清除器 3.3V LVPECL/LVDS Clock Synthesizer System (I Temp, Green) RoHS:否 制造商:Skyworks Solutions, Inc. 輸出端數(shù)量: 輸出電平: 最大輸出頻率: 輸入電平: 最大輸入頻率:6.1 GHz 電源電壓-最大:3.3 V 電源電壓-最小:2.7 V 封裝 / 箱體:TSSOP-28 封裝:Reel |
| SY89537LMY TR | 功能描述:時(shí)鐘合成器/抖動(dòng)清除器 3.3V LVPECL/LVDS Clock Synthesizer System (I Temp, Green) RoHS:否 制造商:Skyworks Solutions, Inc. 輸出端數(shù)量: 輸出電平: 最大輸出頻率: 輸入電平: 最大輸入頻率:6.1 GHz 電源電壓-最大:3.3 V 電源電壓-最小:2.7 V 封裝 / 箱體:TSSOP-28 封裝:Reel |
| SY89537LMYTR | 制造商:MICREL 制造商全稱:Micrel Semiconductor 功能描述:3.3V Precision LVPECL and LVDS |
| SY89538L | 制造商:MICREL 制造商全稱:Micrel Semiconductor 功能描述:3.3V, Precision LVPECL and LVDS Programmable Multiple Output Bank Clock Synthesizer and Fanout Buffer with Zero Delay |
| SY89538L_06 | 制造商:MICREL 制造商全稱:Micrel Semiconductor 功能描述:3.3V, Precision LVPECL and LVDS Programmable Multiple Output Bank Clock Synthesizer and Fanout Buffer with Zero Delay |
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