參數(shù)資料
型號(hào): SY89208VMITR
廠商: MICREL INC
元件分類: 通用總線功能
英文描述: 3.3V/5V 3GHz PECL/ECL 2:1 MULTIPLEXER
中文描述: 89208 SERIES, 2 LINE TO 1 LINE MULTIPLEXER, COMPLEMENTARY OUTPUT, DSO8
封裝: 2 X 2 MM, MLF-8
文件頁(yè)數(shù): 4/7頁(yè)
文件大?。?/td> 243K
代理商: SY89208VMITR
4
Precision Edge
SY89208V
Micrel
V
CC
= +3.3V
±
10% or +5V
±
10% and V
EE
= 0V; V
CC
= 0V and V
EE
=
3.3V
±
10% or
5V
±
10%; T
A
=
40
°
C to +85
°
C unless otherwise noted.
Symbol
Parameter
Condition
Min
Typ
Max
Units
f
MAX
t
pd
Max. Toggle Frequency
Note 7
3
GHz
Propagation Delay (Differential)
SEL to Q, /Q; D to Q, /Q
170
230
420
ps
t
SKEW
t
JITTER
Part-to-Part Skew
Note 8
200
ps
Cycle-to-Cycle Jitter (rms)
Note 9
1
ps
(rms)
ps
(rms)
Random Jitter
Note 10
1
Deterministic Jitter
@1.25Gbps
@2.5Gbps
Note 11
Note 10
7
ps
(pk-pk)
ps
(pk-pk)
ps
(pk-pk)
mV
10
Total Jitter
Note 12
10
V
IN
t
r,
t
f
Differential Input Voltage Range
150
800
1200
Output Rise/Fall Time
(20% to 80%)
Q, /Q
90
140
200
ps
Note 1.
Permanent device damage may occur if ABSOLUTE MAXIMUM RATINGS are exceeded. This is a stress rating only and functional operation
is not implied at conditions other than those detailed in the operational sections of this data sheet. Exposure to ABSOLUTE MAXIMUM
RATlNG conditions for extended periods may affect device reliability.
The data sheet limits are not guaranteed if the device is operated beyond the operating ratings.
Package Thermal Resistance assumes exposed pad is soldered (or equivalent) to the devices most negative potential on the PCB.
The device is guaranteed to meet the DC specifications, shown in the table above, after thermal equilibrium has been established.
Output loaded with 50
to V
CC
2V.
V
IHCMR
(min) varies 1:1 with V
EE
, (max) varies 1:1 with V
CC
.
Measured with 750mV input signal, 50% duty cycle. Output swing
400mV. All loading with a 50
to V
CC
2.0V.
Skew is measured between outputs under identical transitions. Duty cycle skew is defined only for differential operation when the delays are
measured from the cross point of the inputs to the cross point of the outputs.
The variation in period between adjacent cycles over a random sample of adjacent cycle pairs. t
JITTER_CC
= t
n
t
n
+ 1, where t is the time between
rising edges of the output signal.
Note 10.
Random jitter is measured with a K28.7 comma detect character pattern, measured at 1.25Gbps and 2.5Gbps.
Note 11.
Deterministic jitter is measured at 1.25Gbps and 2.5Gbps, with both K28.5 and 2
23
1 PRBS pattern.
Note 12.
Total Jitter definition with an ideal clock input, no more than 1 output edge in 10
12
output edges will deviate by more than specified peak-to-peak
jitter value.
Note 2.
Note 3.
Note 4.
Note 5.
Note 6.
Note 7.
Note 8.
Note 9.
AC ELECTRICAL CHARACTERISTICS
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