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參數資料
| 型號： | SY89112U |
| 廠商： | Micrel Semiconductor,Inc. |
| 英文描述： | 2.5V Low Jitter, Low Skew 1:12 LVDS Fanout Buffer with 2:1 Input MUX and Intermal Termination |
| 中文描述： | 2.5V的低抖動，低偏移1:12 LVDS扇出緩沖器的2:1輸入MUX和Intermal終止 |
| 文件頁數： | 7/14頁 |
| 文件大?。?/td> | 628K |
| 代理商： | SY89112U |
Micrel, Inc.
AC Electrical Characteristics
(8)
SY89113U
March 2005
M9999-032905
hbwhelp@micrel.com
or (408) 955-1690
7
V
CC
= +2.5V ±5%; T
A
= –40°C to + 85°C, R
L
= 100
across the output pair, unless otherwise stated.
Symbol
Parameter
Condition
Min
Typ
Max
Units
f
MAX
Maximum Operating Frequency
V
OUT
≥
200mV
V
IN
≥
100mV
V
IN
≥
200mV
1
GHz
625
750
975
ps
700
900
1200
ps
t
PD
Propagation Delay
CLK0-to-Q
CLK1-to-Q
CLK_SEL-to-Q
500
700
900
ps
t
PD
Tempco
Differential Propagation Delay Temperature
Coefficient
90
fs/
o
C
Note 9
100
ps
t
S
Set-up Time
EN-to-CLK0
EN-to-CLK1
Note 9
0
ps
Note 9
500
ps
t
H
Hold Time
CLK0-to-EN
CLK1-to-EN
Note 9
600
ps
Output-to-Output Skew
Note 10
25
ps
Note 11
200
ps
t
SKEW
Part-to-Part Skew CLK0
Part-to-Part Skew CLK1
Note 11
250
ps
Cycle-to-Cycle Jitter
Note 12
1
ps
RMS
ps
RMS
ps
PP
ps
RMS
ps
Random Jitter (RJ)
Note 13
1
Total Jitter (TJ)
Note 14
10
t
JITTER
Adjacent Channel Crosstalk-induced Jitter
Note 15
0.7
t
r,
t
f
Output Rise/Fall Time (20% to 80%)
At full output swing.
80
150
250
Notes:
8.
9.
High-frequency AC-parameters are guaranteed by design and characterization.
Set-up and hold times apply to synchronous applications that intend to enable/disable before the next clock cycle. For asynchronous
applications, set-up and hold do not apply.
10. Output-to-output skew is measured between two different outputs under identical input transitions.
11. Part-to-part skew is defined for two parts with identical power supply voltages at the same temperature and with no skew of the edges at
the respective inputs
12. Cycle-to-cycle jitter definition: the variation of periods between adjacent cycles, T
n
– T
n-1
where T is the time between rising edges of the
output signal.
13. Random jitter is measured with a K28.7 character pattern, measured at <f
MAX
.
14. Total jitter definition: with an ideal clock input of frequency <f
MAX
, no more than one output edge in 10
12
output edges will deviate by more
than the specified peak-to-peak jitter value.
15. Crosstalk-induced jitter is defined as: the added jitter that results from signals applied to two adjacent channels. It is measured at the output
while applying two similar, differential clock frequencies that are asynchronous with respect to each other at the inputs.
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相關代理商/技術參數 |
參數描述 |
|---|---|
| SY89112U_11 | 制造商:MICREL 制造商全稱:Micrel Semiconductor 功能描述:2.5/3.3V Low-Jitter, Low-Skew 1:12 LVPECL Fanout Buffer with 2:1 Input MUX |
| SY89112UMG | 功能描述:IC CLK BUFF MUX 2:12 3GHZ 44-MLF RoHS:是 類別:集成電路 (IC) >> 時鐘/計時 - 時鐘緩沖器，驅動器 系列:Precision Edge® 標準包裝:1 系列:HiPerClockS™ 類型:扇出緩沖器（分配），多路復用器 電路數:1 比率 - 輸入:輸出:2:18 差分 - 輸入:輸出:是/無 輸入:CML，LVCMOS，LVPECL，LVTTL，SSTL 輸出:LVCMOS，LVTTL 頻率 - 最大:250MHz 電源電壓:2.375 V ~ 3.465 V 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:32-LQFP 供應商設備封裝:32-TQFP（7x7） 包裝:- 其它名稱:800-1923-6 |
| SY89112UMG TR | 功能描述:IC CLK BUFF MUX 2:12 3GHZ 44-MLF RoHS:是 類別:集成電路 (IC) >> 時鐘/計時 - 時鐘緩沖器，驅動器 系列:Precision Edge® 標準包裝:1 系列:HiPerClockS™ 類型:扇出緩沖器（分配），多路復用器 電路數:1 比率 - 輸入:輸出:2:18 差分 - 輸入:輸出:是/無 輸入:CML，LVCMOS，LVPECL，LVTTL，SSTL 輸出:LVCMOS，LVTTL 頻率 - 最大:250MHz 電源電壓:2.375 V ~ 3.465 V 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:32-LQFP 供應商設備封裝:32-TQFP（7x7） 包裝:- 其它名稱:800-1923-6 |
| SY89112UMI | 制造商:MICREL 制造商全稱:Micrel Semiconductor 功能描述:2.5/3.3V Low-Jitter, Low-Skew 1:12 LVPECL Fanout Buffer with 2:1 Input MUX and Internal Termination |
| SY89112UMITR | 制造商:MICREL 制造商全稱:Micrel Semiconductor 功能描述:2.5/3.3V Low-Jitter, Low-Skew 1:12 LVPECL Fanout Buffer with 2:1 Input MUX and Internal Termination |
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