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參數(shù)資料
| 型號： | SY88993AVKI TR |
| 廠商： | Micrel Inc |
| 文件頁數(shù)： | 3/8頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC AMP POST 5/3.3V HS TTL 10MSOP |
| 標(biāo)準(zhǔn)包裝： | 1,000 |
| 類型： | 限幅后置放大器 |
| 應(yīng)用： | 光纖學(xué)網(wǎng)絡(luò) |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 10-TFSOP，10-MSOP（0.118"，3.00mm 寬） |
| 供應(yīng)商設(shè)備封裝： | 10-MSOP |
| 包裝： | 帶卷 (TR) |
| 其它名稱： | SY88993AVKITR SY88993AVKITR-ND |
Micrel, Inc.
SY56028XR
April 2010
3
M9999-040810-A
hbwhelp@micrel.com or (408) 955-1690
Pin Description
Pin Number
Pin Name
Pin Function
1,3
5,7
25,27
29,31
IN0, /IN0
IN1, /IN1
IN2, /IN2
IN3, /IN3
Differential Inputs: Accepts differential signals as small as 200mV (400mVPP)
applied to the input of a 9, 18 or 27 inch 6mil FR4 stripline transmission line. See
“Input and Output Stage” section for details of this input.
2
6
26
30
VT0
VT1
VT2
VT3
Input Termination Center-Tap: Each side of the differential input pair terminates to
the VT pin. This pin provides a center-tap to a termination network for maximum
interface flexibility. An internal high impedance resistor divider biases VT to allow
input AC coupling. For AC coupling, bypass VT with 0.1F low ESR capacitor to
VCC. See “Input Interface Applications” subsection and Figure 2a.
19
EQ
Three level input for equalization control.
15
18
SEL0
SEL1
Single-ended TTL/CMOS compatible input selects the inputs to the multiplexer. This
input is internally connected to a 25k
pull-up resistor and will default to a logic
HIGH state if left open. Input logic threshold is VCC/2. See “Truth Table” for select
control.
16,17
VCC
Positive Power Supply: Bypass with 0.1uF//0.01uF low ESR capacitors as close to
the VCC pin as possible. Supplies the input and core circuitry.
10,13,20,23
VCCO
Output Supply: Bypass with 0.1uF//0.01uF low ESR capacitors as close to the VCCO
pin as possible. Supplies the output buffers.
4,8,9,24,28,32
GND,
Exposed pad
Ground: Exposed pad must be connected to a ground plane that is the same
potential as the ground pins.
12,11
22,21
Q0, /Q0
Q1, /Q1
CML Differential Output Pair: Differential buffered copy of the input signal. The
output swing is typically 390mV. See “Functional Description” subsection for
termination information.
Truth Table
EQ Input
Equalization FR4 6mil
Stripline
LOW
9 “
FLOAT
18”
HIGH
27”
SEL1
SEL0
0
IN0 Input Selected
0
1
IN1 Input Selected
1
0
IN2 Input Selected
1
IN3 Input Selected
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| SY88993V | 制造商:MICREL 制造商全稱:Micrel Semiconductor 功能描述:5V/3.3V 3.2Gbps HIGH-SPEED LIMITING POST AMPLIFIER |
| SY88993V_05 | 制造商:MICREL 制造商全稱:Micrel Semiconductor 功能描述:5V/3.3V 3.2Gbps HIGH-SPEED LIMITING POST AMPLIFIER |
| SY88993VKC | 功能描述:IC AMP POST 5/3.3V HS TTL 10MSOP RoHS:否 類別:集成電路 (IC) >> 線性 - 放大器 - 專用 系列:- 產(chǎn)品培訓(xùn)模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標(biāo)準(zhǔn)包裝:60 系列:- 類型:可變增益放大器 應(yīng)用:CATV 安裝類型:表面貼裝 封裝/外殼:20-WQFN 裸露焊盤 供應(yīng)商設(shè)備封裝:20-TQFN-EP（5x5） 包裝:托盤 |
| SY88993VKC TR | 功能描述:IC AMP POST 5/3.3V HS TTL 10MSOP RoHS:否 類別:集成電路 (IC) >> 線性 - 放大器 - 專用 系列:- 產(chǎn)品培訓(xùn)模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標(biāo)準(zhǔn)包裝:60 系列:- 類型:可變增益放大器 應(yīng)用:CATV 安裝類型:表面貼裝 封裝/外殼:20-WQFN 裸露焊盤 供應(yīng)商設(shè)備封裝:20-TQFN-EP（5x5） 包裝:托盤 |
| SY88993VKCTR | 制造商:MICREL 制造商全稱:Micrel Semiconductor 功能描述:5V/3.3V 3.2Gbps HIGH-SPEED LIMITING POST AMPLIFIER |
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