vs LOS" />
參數(shù)資料
型號: SY88923KC
廠商: Micrel Inc
文件頁數(shù): 4/6頁
文件大小: 0K
描述: IC AMP POST 5V/3.3V 10-MSOP
標(biāo)準(zhǔn)包裝: 100
類型: 限幅后置放大器
應(yīng)用: 光纖學(xué)網(wǎng)絡(luò)
安裝類型: 表面貼裝
封裝/外殼: 10-TFSOP,10-MSOP(0.118",3.00mm 寬)
供應(yīng)商設(shè)備封裝: 10-MSOP
包裝: 管件
4
SY88923
Micrel, Inc.
M9999-061907
hbwhelp@micrel.com or (408) 955-1690
LOS Assert and Deassert Levels
vs LOSLVL
0.00
10.00
20.00
30.00
40.00
50.00
60.00
70.00
80.00
90.00
100.00
2.53
2.65
2.77
2.90
3.02
3.14
3.27
3.39
3.52
3.64
3.76
3.89
4.01
4.13
4.26
4.38
4.51
4.63
4.75
4.88
5.00
LOSLVL (V)
Level
(mV)
Deassert
Assert
Output Termination
The SY88923 outputs must be terminated with a 50
load to VCC – 2V (or thevenin equivalent).
Layout and PCB Design
Since the SY88923 is a high-frequency component,
performance can largely be determined by board layout
and design. A common problem with high-gain amplifiers is
feedback from the large swing outputs to the input via power
supply.
The SY88923 ground pin should be connected to the
circuit board ground. Use multiple PCB vias close to the
part to connect to ground. Avoid long, inductive runs which
can degrade performance.
DESIGN PROCEDURE
Figure 3. LOSLVL Circut
Note:
Resistor Divider = R2/ (R1 + R2)
R1 + R2 ≥ 5k
Figure 2. Differential Input Configuration
DIN+
DIN–
VREF
50
0.1F
VCC
R1
R2
LOSLVL
VREF
PERFORMANCE CURVE
Figure 4. 223-1 Pattern
Figure 5. 223-1 Pattern
0.00
0.05
0.10
0.15
0.20
0.25
0.30
0.35
0.40
0.45
0.50
0.55
0.60
0.65
0.70
0.75
0.80
0.85
0.90
0.95
1.00
Resistor Divider R2 / (R1 + R2)
Deassert
Assert
LOS Assert and Deassert Levels
vs Resistor Divide
0.00
10.00
20.00
30.00
40.00
50.00
60.00
70.00
80.00
90.00
100.00
Level
(mV)
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