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參數(shù)資料
型號: SY88808LMH
廠商: Micrel Inc
文件頁數(shù): 8/10頁
文件大?。?/td> 0K
描述: IC TXRX W/EQ 3.3V 10.3GBPS 28MLF
標(biāo)準包裝: 75
類型: 收發(fā)器
驅(qū)動器/接收器數(shù): 1/1
電源電壓: 3.135 V ~ 3.465 V
安裝類型: 表面貼裝
封裝/外殼: 28-VFQFN 裸露焊盤
供應(yīng)商設(shè)備封裝: 28-QFN(4x4)
包裝: 管件
其它名稱: 576-3739-5
Micrel, Inc.
SY88808L
June 2010
7
M9999-063010-A
hbwhelp@micrel.com or (408) 955-1690
LVTTL/CMOS DC Electrical Characteristics
(7)
VCC = +3.3V ±5%, TA = 0°C to +70°C, unless otherwise stated.
Symbol
Parameter
Condition
Min.
Typ.
Max.
Units
VIH
Input HIGH Voltage
2
V
VIL
Input LOW Voltage
0.8
V
IIH
Input HIGH Current
125
30
A
IIL
Input LOW Current
300
A
AC Electrical Characteristics
(8)
VCC = 3.3V ±5%; VEE = 0V; TA = 0°C to +70°C; RL = 100
across output pair; unless otherwise stated.
Symbol
Parameter
Condition
Min.
Typ.
Max.
Units
FREQ
Data Rate Throughput
NRZ Data
1
10.3
Gbps
tpd
Differential Propagation Delay
RXIN-to-RXQ
150
250
450
ps
TXIN-to-TXQ
150
250
450
tSKEW
Part-to-Part Skew
Note 9
200
ps
t/EN
TXQ Enable/Disable Time
/TXEN
450
600
ps
RXQ Enable/Disable Time
/RXEN
450
600
tJITTER
Deterministic Jitter (DJ)
Note 10
10
psPP
Total Jitter (TJ)
Note 11
20
LOSDELAY
LOS Delay
t_los_on and t_los_off (see Figure 1)
100
s
tr, tf
Output Rise/Fall Time (20% to 80%)
At Full Output Swing
20
30
60
ps
Notes:
1. Permanent device damage may occur if absolute maximum ratings are exceeded. This is a stress rating only and functional operation is not implied
at conditions other than those detailed in the operational sections of this data sheet. Exposure to absolute maximum ratings conditions for extended
periods may affect device reliability.
2. The data sheet limits are not guaranteed if the device is operated beyond the operating ratings.
3. Package thermal resistance assumes exposed pad is soldered (or equivalent) to the devices most negative potential on the PCB.
θ
JA and ΨJB values
are determined for a 4-layer board in still air unless otherwise stated.
4. The circuit is designed to meet the DC specifications shown in the above table after thermal equilibrium has been established. TJ < 125°C.
5. Measured at input of the transmission line.
6. Measured with 101010 pattern at 10.3Gbps.
7. The circuit is designed to meet the DC specifications, shown in the above table, after thermal equilibrium has been established. TJ < 125°C.
8. High-frequency AC-parameters are guaranteed by design and characterization.
9. Part-to-part skew is defined for two parts with identical power supply voltages at the same temperature and with no skew of the edges at the
respective inputs.
10. Deterministic jitter is measured with 2
11-1 PRBS pattern at 10.3Gbps.
11. Total jitter is measured with 2
11-1 PRBS pattern at 10.3Gbps.
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