hbwhelp@micrel.com or (408) 955-1690 3 Ordering Infor" />
參數(shù)資料
型號(hào): SY88703VKC TR
廠商: Micrel Inc
文件頁(yè)數(shù): 3/8頁(yè)
文件大小: 0K
描述: IC AMP POST PECL 3.3V/5V 10-MSOP
標(biāo)準(zhǔn)包裝: 1,000
類型: 限幅后置放大器
應(yīng)用: 光纖學(xué)網(wǎng)絡(luò)
安裝類型: 表面貼裝
封裝/外殼: 10-TFSOP,10-MSOP(0.118",3.00mm 寬)
供應(yīng)商設(shè)備封裝: 10-MSOP
包裝: 帶卷 (TR)
其它名稱: SY88703VKCTR
SY88703VKCTR-ND
Micrel, Inc.
SY89858U
Oct. 1, 2013
M9999-082907-C
hbwhelp@micrel.com or (408) 955-1690
3
Ordering Information
(1)
Part Number
Package
Type
Operating
Range
Package Marking
Lead
Finish
SY89858UMG
QFN-32
Industrial
SY89858 with Pb-Free bar-line indicator
NiPdAu
Pb-Free
SY89858UMGTR
(2)
QFN-32
Industrial
SY89858 with Pb-Free bar-line indicator
NiPdAu
Pb-Free
Notes:
1. Contact factory for die availability. Dice are guaranteed at TA = 25°C, DC Electricals Only.
2. Tape and Reel.
Pin Configuration
32-Pin QFN
Pin Description
Pin Number
Pin Name
Pin Function
3, 6
IN, /IN
Differential Input: This differential input accepts AC- or DC-coupled signals as
small as 100mV (200mVPP). Each pin of this pair internally terminates to a VT pin
open. Please refer to the “Input Interface Applications” section for more details.
4
VT
Input Termination Center-Tap: Each side of the differential input pair terminates
to this VT pin. The VT pin provides a center-tap to a termination network for
maximum interface flexibility. See the
“Input Interface Applications” section for
more details.
5
VREF-AC
Reference Voltage: This output biases to VCC–1.2V (typical). It is used for AC-
coupling inputs IN and /IN. Connect VREF-AC directly to the corresponding VT
pin. Bypass with 0.01uF low ESR capacitor to VCC. Maximum sink/source
capability is 1.5mA.
1, 8, 9, 16, 18,
23, 25, 32
VCC
Positive Power Su
to the VCC pins as possible.
31, 30, 29, 28,
27, 26, 22, 21,
20, 19, 15, 14,
13, 12, 11, 10
Q0, /Q0, Q1,
/Q1, Q2, /Q2,
Q3, /Q3, Q4,
/Q4, Q5, /Q5,
Q6, /Q6, Q7,
/Q7
100k LVPECL Differential Outputs: Differential buffered output copy of the input
signal. The LVPECL output swing is typically 800mV into 50 to VCC–2V.
Unused output pairs may be left floating with no impact on jitter. See “LVPECL
Output” section.
2, 7, 17, 24
GND
Exposed Pad
Ground: Ground pins and exposed pad must be connected to the same ground
plane.
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