Case #4 Input Clock Failure: Switching from the selected " />
參數(shù)資料
型號(hào): SY88149NDLMG
廠商: Micrel Inc
文件頁數(shù): 2/13頁
文件大?。?/td> 0K
描述: IC LIMITING AMP 1.25GBPS 16QFN
特色產(chǎn)品: SY88149NDL Limiting Post Amplifier
標(biāo)準(zhǔn)包裝: 75
類型: 限幅后置放大器
應(yīng)用: 光纖學(xué)網(wǎng)絡(luò)
安裝類型: 表面貼裝
封裝/外殼: 16-VFQFN 裸露焊盤
供應(yīng)商設(shè)備封裝: 16-QFN(3x3)
包裝: 管件
其它名稱: 576-4000
Micrel, Inc.
SY89838U
May 2008
M9999-051308-D
hbwhelp@micrel.com or (408) 955-1690
10
Case #4 Input Clock Failure: Switching from the
selected clock input stuck in an undetermined state to
a valid clock input (RPE enabled)
If CLK1 fails to an undetermined state (e.g., amplitude
falls below the 100mV (VIN) minimum single-ended
input limit, or 200mV differentially) before the RPE
MUX selects CLK2 (using the SEL pin), the switchover
to the valid clock CLK2 will occur either following Case
#2 or Case #3, depending on the last valid state at the
CLK1.
If the selected input clock fails to a floating, static, or
extremely low signal swing, including 0mV, the FSI
function will eliminate any metastable condition and
guarantee a stable output signal. No ringing and no
undetermined state will occur at the output under
these conditions.
Please note that the FSI function will not prevent duty
cycle distortions or runt pulses in case of a slowly
deteriorating (but still toggling) input signal. Due to the
FSI function, the propagation delay will depend on rise
and fall time of the input signal and on its amplitude.
Refer to “Typical Operating Characteristics” for more
detailed information.
Power-On Reset (POR) Description
The SY89838U includes an internal power-on reset
(POR) function to ensure the RPE logic starts-up in a
known logic state once the power-supply voltage is
stable. An external capacitor connected between VCC
and the CAP pin (pin 10) controls the delay for the
power-on reset function.
Calculation of the required capacitor value is based on
the time the system power supply needs to power up
to a minimum of 2.3V. The time constant for the
internal power-on-reset must be greater than the time
required for the power supply to ramp up to a minimum
of 2.3V.
The following formula describes this relationship:
C(F) ≥
)
/
(
12
)
(
F
ms
t
dPS
As an example, if the time required for the system
power supply to power up past 2.3V is 12ms, the
required capacitor value on pin 10 would be:
C(F) ≥
)
/
(
12
F
ms
C(F) ≥
F
1
CLK1
CLK2
SEL
Select CLK 1
Select CLK 2
OUTPUT
as in case #2
as in case #3
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