參數(shù)資料
型號: SY88149HLMG TR
廠商: Micrel Inc
文件頁數(shù): 5/11頁
文件大?。?/td> 0K
描述: IC POST AMP BURST GEPON/GPON 16M
標準包裝: 1,000
類型: 限幅后置放大器
應用: 光纖學網(wǎng)絡
安裝類型: 表面貼裝
封裝/外殼: 16-VFQFN 裸露焊盤,16-MLF?
供應商設備封裝: 16-MLF?(3x3)
包裝: 帶卷 (TR)
Micrel, Inc.
SY88149HL
June 2010
3
M9999-061110-I
hbwhelp@micrel.com or (408) 955-1690
Pin Description
Pin Number
Pin Name
Pin Function
1, 4
DIN, /DIN
Data Inputs. If AC-Coupled, terminate each pin to Vref with 50
Ω.
2
VREF
Reference Voltage Output. Typically Vcc – 1.3V.
3,11,8
GND
Device Ground. Exposed pad must be soldered (or equivalent) to the same potential as
ground pins.
10
/AUTORESET
LVTTL Input. This pin is internally connected to a 25k
pull-up resistor and defaults to
HIGH. When this pin is LOW or tied to ground, the /AUTORESET function is enabled and
SD de-asserts or LOS asserts within 100ns (typical) after the last high to low transition of
the burst input. When this pin is left floating or not connected, the AUTORESET function
is disabled and the SD de-assert or LOS assert must be forced by using the manual
RESET function.
5,16
VCC
Positive power supply. Bypass with 0.1uF | | 0.01uF low ESR capacitors. 0.01uF
capacitors should be as close as possible to VCC pins.
6
RESET
LVTTL Input. Apply a high-level signal (>2V) to this pin to discharge the time constant and
reset the signal de-assert time or LOS assert time within 5ns. RESET defaults to Low if
left floating. If the /AUTORESET function is not used, this RESET function needs to be
used to quickly de-assert the SD or assert LOS. Note that this input is internally
connected to a 25k
pull-up resistor.
7
LOS/SD
LVTTL Output. Signal-Detect (SD) asserts high when the data input amplitude rises
above the threshold set by SDLVL. Conversely, Loss-of-Signal (LOS) de-asserts low when
the data input amplitude rises above the threshold set by LOSLVL.
12, 9
DOUT, /DOUT
LVPECL Outputs. When JAM disables the device, output DOUT is forced to logic LOW
and output /DOUT is forced to logic HIGH.
13
LOS/SDSEL
LVTTL Input. Connect to VCC or leave open to select SD; set low or connect-to-GND to
select LOS. This pin also controls the LOS/SD output and polarity of the JAM function.
When SD is selected, JAM is active LOW and LOS/SD (pin 7) operates as signal detect.
Conversely, when LOS is selected, JAM is active HIGH and LOS/SD operates as loss-of-
signal. Note that this input is internally connected to a 25
pull-down resistor
14
LOS/SDLVL
Voltage Input. Sets the Loss of Signal/Signal Detect Level. A resistor from this pin to VCC
sets the threshold for the data input amplitude at which LOS/SD will be asserted.
15
JAM
LVTTL Input. JAM acts as a squelch function which can disable the LVPECL outputs.
The polarity of the input that triggers an active JAM depends upon LOS/SDSEL status.
When LOS is selected, this pin is active HIGH. When SD is selected, this pin is active
LOW. To create a squelch function, connect JAM to LOS/SD output. When JAM disables
the device, output Q is forced to logic LOW and output /Q is forced to logic HIGH. Note
that this input is internally connected to a 25k
pull-up resistor.
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