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參數(shù)資料
| 型號(hào)： | SY87701ALZG |
| 廠商： | Micrel Inc |
| 文件頁數(shù)： | 15/15頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC CLOCK/DATA RECOVERY 28-SOIC |
| 標(biāo)準(zhǔn)包裝： | 27 |
| 系列： | AnyRate® |
| 類型： | 時(shí)鐘和數(shù)據(jù)恢復(fù)（CDR），多路復(fù)用器 |
| PLL： | 是 |
| 主要目的： | 以太網(wǎng)，SONET/SDH，ATM 應(yīng)用 |
| 輸入： | PECL |
| 輸出： | PECL |
| 電路數(shù)： | 1 |
| 比率 - 輸入:輸出： | 1:3 |
| 差分 - 輸入:輸出： | 是/是 |
| 頻率 - 最大： | 1.3Gbps |
| 電源電壓： | 3.15 V ~ 3.45 V |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 28-SOIC（0.295"，7.50mm 寬） |
| 供應(yīng)商設(shè)備封裝： | 28-SOIC |
| 包裝： | 管件 |
| 產(chǎn)品目錄頁面： | 1089 (CN2011-ZH PDF) |
| 其它名稱： | 576-2541 SY87701ALZG-ND |
2011 Microchip Technology Inc.
DS25009C-page 9
MCP7940X
FIGURE 4-2:
ACKNOWLEDGE TIMING
4.1.2
DEVICE ADDRESSING AND OPERATION
A control byte is the first byte received following the
Start condition from the master device (Figure 4-2).
The control byte consists of a control code; for the
MCP7940X this is set as ‘1010111’ for read and write
operations for the Unique ID after the correct unlock
sequence.
The control byte for accessing the SRAM and RTCC
registers are set to ‘1101111’. The RTCC registers and
the SRAM share the same address space.
The last bit of the control byte defines the operation to
be performed. When set to a ‘1’ a read operation is
selected, and when set to a ‘0’ a write operation is
selected. The next byte received defines the address of
the data byte (Figure 4-3). The upper address bits are
transferred first, followed by the Least Significant bits
(LSb).
Following the Start condition, the MCP7940X monitors
the SDA bus, checking the device type identifier being
transmitted.
Upon
receiving
an
‘1010111’ or
‘1101111’ code, the slave device outputs an
Acknowledge signal on the SDA line. Depending on the
state of the R/W bit, the MCP7940X will select a read
or write operation.
FIGURE 4-3:
ADDRESS SEQUENCE BIT ASSIGNMENTS
SCL
9
8
7
6
5
4
3
2
11
2
3
Transmitter must release the SDA line at this point
allowing the Receiver to pull the SDA line low to
acknowledge the previous eight bits of data.
Receiver must release the SDA line at this point
so the Transmitter can continue sending data.
Data from transmitter
SDA
Acknowledge
Bit
1
010
R/W
1
A
0
11
1
0
A
Unique ID CONTROL BYTE
ADDRESS BYTE
CONTROL
CODE
111
X = Don’t Care
1
101
R/W
X
A
0
SRAM RTCC CONTROL BYTE
ADDRESS BYTE
CONTROL
CODE
111
X = Don’t Care
21
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| SY87701ALZG TR | 功能描述:計(jì)時(shí)器和支持產(chǎn)品 3.3V Any-Rate 32-1250 Mbps CDR (I Temp, Green/28 pin SOIC/T+R) RoHS:否 制造商:Micrel 類型:Standard 封裝 / 箱體:SOT-23 內(nèi)部定時(shí)器數(shù)量:1 電源電壓-最大:18 V 電源電壓-最小:2.7 V 最大功率耗散: 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝:Reel |
| SY87701ALZI | 制造商:MICREL 制造商全稱:Micrel Semiconductor 功能描述:3.3V 28Mbps to 1.3Gbps AnyRate Clock and Data Recovery |
| SY87701L | 制造商:MICREL 制造商全稱:Micrel Semiconductor 功能描述:3.3V 32-1250Mbps AnyRate CLOCK AND DATA RECOVERY Use lower-power SY87701AL for new designs |
| SY87701L_06 | 制造商:MICREL 制造商全稱:Micrel Semiconductor 功能描述:3.3V 32-1250Mbps AnyRate CLOCK AND DATA RECOVERY |
| SY87701L_11 | 制造商:MICREL 制造商全稱:Micrel Semiconductor 功能描述:3.3V 32-1250Mbps AnyRate CLOCK AND DATA RECOVERY Use lower-power SY87701AL for new designs |
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