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參數(shù)資料
| 型號(hào)： | SY58611UMG TR |
| 廠商： | Micrel Inc |
| 文件頁數(shù)： | 9/13頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC MUX 2:1 LVDS FSI INPUT 16-MLF |
| 標(biāo)準(zhǔn)包裝： | 1,000 |
| 系列： | SY58 |
| 類型： | 多路復(fù)用器 |
| 電路： | 2 x 2:1 |
| 獨(dú)立電路： | 1 |
| 電壓電源： | 單電源 |
| 電源電壓： | 3 V ~ 3.6 V |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 16-VFQFN 裸露焊盤，16-MLF? |
| 供應(yīng)商設(shè)備封裝： | 16-MLF?（3x3） |
| 包裝： | 帶卷 (TR) |
| 其它名稱： | SY58611UMGTR SY58611UMGTR-ND |
Micrel, Inc.
SY58611U
March 2007
5
M9999-030607-A
hbwhelp@micrel.com or (408) 955-1690
AC Electrical Characteristics(8)
VCC = +2.5V ±5%, RL = 100 across the output pair; Input tr/tf < 300ps, TA = –40°C to +85°C, unless otherwise stated.
Symbol
Parameter
Condition
Min
Typ
Max
Units
NRZ Data
3.2
Gbps
fMAX
Maximum Frequency
VOUT > 200mV
Clock
2.5
3
GHz
VIN: 100mV-200mV
190
330
470
ps
Propagation Delay
IN-to-Q
VIN: > 200mV
150
280
420
ps
tPD
SEL-to-Q
150
450
ps
Input-to-Input Skew
Note 9, 10
5
20
ps
tSkew
Part-to-Part Skew
Note 11
150
ps
Data
Random Jitter
Note 12
1
psRMS
Deterministic Jitter
Note 13
10
psPP
Clock
Cycle-to-Cycle Jitter
Note 14
1
psRMS
tJitter
Total Jitter
Note 15
10
psPP
tr, tf
Output Rise/Fall Times
(20% to 80%)
At full output swing.
40
80
120
ps
Duty Cycle
Differential I/O
47
53
%
Notes:
8.
High-frequency AC-parameters are guaranteed by design and characterization.
9.
Input-to-Input skew is the time difference between the two inputs and one output, under identical input transitions.
10. Input-to-Input Skew is included in IN-to-Q propagation delay.
11. Part-to-part skew is defined for two parts with identical power supply voltages at the same temperature, same transition edge, and no skew at
the edges at the respective inputs.
12. Random jitter is measured with a K28.7 pattern, measured at ≤ fMAX.
13. Deterministic jitter is measured at 2.5Gbps with both K28.5 and 2
23–1 PRBS pattern.
14. Cycle-to-cycle jitter definition: the variation period between adjacent cycles over a random sample of adjacent cycle pairs. tJITTER_CC = Tn –Tn+1,
where T is the time between rising edges of the output signal.
15. Total jitter definition: with an ideal clock input frequency of ≤ fMAX (device), no more than one output edge in 10
12 output edges will deviate by
more than the specified peak-to-peak jitter value.
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| SY58620L | 制造商:MICREL 制造商全稱:Micrel Semiconductor 功能描述:Precision 4.25Gbps CML Backplane Transceiver with Integrated Loopback |
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| SY58620LMG | 功能描述:總線收發(fā)器 4.25Gbps Transceiver w/ CML Outputs (I Temp, Green) RoHS:否 制造商:Fairchild Semiconductor 邏輯類型:CMOS 邏輯系列:74VCX 每芯片的通道數(shù)量:16 輸入電平:CMOS 輸出電平:CMOS 輸出類型:3-State 高電平輸出電流:- 24 mA 低電平輸出電流:24 mA 傳播延遲時(shí)間:6.2 ns 電源電壓-最大:2.7 V, 3.6 V 電源電壓-最小:1.65 V, 2.3 V 最大工作溫度:+ 85 C 封裝 / 箱體:TSSOP-48 封裝:Reel |
| SY58620LMG TR | 功能描述:總線收發(fā)器 4.25Gbps Transceiver w/ CML Outputs (I Temp, Green) RoHS:否 制造商:Fairchild Semiconductor 邏輯類型:CMOS 邏輯系列:74VCX 每芯片的通道數(shù)量:16 輸入電平:CMOS 輸出電平:CMOS 輸出類型:3-State 高電平輸出電流:- 24 mA 低電平輸出電流:24 mA 傳播延遲時(shí)間:6.2 ns 電源電壓-最大:2.7 V, 3.6 V 電源電壓-最小:1.65 V, 2.3 V 最大工作溫度:+ 85 C 封裝 / 箱體:TSSOP-48 封裝:Reel |
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