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參數(shù)資料
| 型號： | SY58610UMG |
| 廠商： | Micrel Inc |
| 文件頁數(shù)： | 10/14頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC MUX 2:1 LVPECL FSI INP 16-MLF |
| 標準包裝： | 100 |
| 系列： | SY58 |
| 類型： | 多路復用器 |
| 電路： | 2 x 2:1 |
| 獨立電路： | 1 |
| 電壓電源： | 單電源 |
| 電源電壓： | 3 V ~ 3.6 V |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 16-VFQFN 裸露焊盤，16-MLF? |
| 供應商設備封裝： | 16-MLF?（3x3） |
| 包裝： | 管件 |
| 產(chǎn)品目錄頁面： | 1089 (CN2011-ZH PDF) |
| 其它名稱： | 576-2052-5 SY58610UMG-ND |
Micrel, Inc.
SY58610U
August 2007
5
M9999-082907-C
hbwhelp@micrel.com or (408) 955-1690
AC Electrical Characteristics
(8)
VCC = +2.5V ±5% or +3.3V ±10%, RL = 50
to V
CC-2V; Input tR/tF < 300ps, TA = –40°C to +85°C, unless otherwise
stated.
Symbol
Parameter
Condition
Min
Typ
Max
Units
fMAX
Maximum Frequency
NRZ Data
3.2
Gbps
VOUT > 400mV
Clock
2.5
3
GHz
tPD
Propagation Delay
IN-to-Q
VIN: 100mV-200mV
180
340
470
ps
VIN: >200mV
140
290
370
ps
SEL-to-Q
150
450
ps
tSkew
Input-to-Input Skew
Note 9, 10
5
20
ps
Part-to-Part Skew
Note 11
150
ps
tJitter
Data
Random Jitter
Note 12
1
psRMS
Deterministic Jitter
Note 13
10
psPP
Clock
Cycle-to-Cycle Jitter
Note 14
1
psRMS
Total Jitter
Note 15
10
psPP
tR, tF
Output Rise/Fall Times
(20% to 80%)
At full output swing.
40
100
130
ps
Duty Cycle
Differential I/O
47
53
%
Notes:
8.
High-frequency AC-parameters are guaranteed by design and characterization.
9
Input-to-input skew is the time difference between the two inputs to one output, under identical input transitions.
10
Input-to-Input Skew is included in IN-to-Q propagation delay.
11. Part-to-part skew is defined for two parts with identical power supply voltages at the same temperature, same transition edge, and no skew at
the edges at the respective inputs.
12. Random jitter is measured with a K28.7 pattern, measured at
≤ f
MAX.
13. Deterministic jitter is measured at 2.5Gbps with both K28.5 and 2
23–1 PRBS pattern.
14. Cycle-to-cycle jitter definition: the variation period between adjacent cycles over a random sample of adjacent cycle pairs. tJITTER_CC = Tn –Tn+1,
where T is the time between rising edges of the output signal.
15. Total jitter definition: with an ideal clock input frequency of
≤ f
MAX (device), no more than one output edge in 10^12 output edges will deviate by
more than the specified peak-to-peak jitter value.
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相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| SY58610UMG TR | 功能描述:編碼器、解碼器、復用器和解復用器 4.25Gbps 2:1 LVPECL Mux w/ FSI Inputs RoHS:否 制造商:Micrel 產(chǎn)品:Multiplexers 邏輯系列:CMOS 位數(shù): 線路數(shù)量（輸入/輸出）:2 / 12 傳播延遲時間:350 ps, 400 ps 電源電壓-最大:2.625 V, 3.6 V 電源電壓-最小:2.375 V, 3 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:QFN-44 封裝:Tray |
| SY58610UMGTR | 制造商:MICREL 制造商全稱:Micrel Semiconductor 功能描述:3.2Gbps Precision, LVPECL 2:1 MUX with |
| SY58611U | 制造商:MICREL 制造商全稱:Micrel Semiconductor 功能描述:3.2Gbps Precision, LVDS 2:1 MUX with Internal Termination and Fail Safe Input |
| SY58611UMG | 功能描述:編碼器、解碼器、復用器和解復用器 3.2Gbps 2:1 LVDS Mux w/ FSI Inputs RoHS:否 制造商:Micrel 產(chǎn)品:Multiplexers 邏輯系列:CMOS 位數(shù): 線路數(shù)量（輸入/輸出）:2 / 12 傳播延遲時間:350 ps, 400 ps 電源電壓-最大:2.625 V, 3.6 V 電源電壓-最小:2.375 V, 3 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:QFN-44 封裝:Tray |
| SY58611UMG TR | 功能描述:編碼器、解碼器、復用器和解復用器 3.2Gbps 2:1 LVDS Mux w/ FSI Inputs RoHS:否 制造商:Micrel 產(chǎn)品:Multiplexers 邏輯系列:CMOS 位數(shù): 線路數(shù)量（輸入/輸出）:2 / 12 傳播延遲時間:350 ps, 400 ps 電源電壓-最大:2.625 V, 3.6 V 電源電壓-最小:2.375 V, 3 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:QFN-44 封裝:Tray |
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