Precision Edge SY58030U Micrel, Inc. M9999-082707 hbwhelp@micrel.com or (408) 955-1690 SINGLE-ENDED A" />
參數(shù)資料
型號: SY58030UMG
廠商: Micrel Inc
文件頁數(shù): 7/11頁
文件大小: 0K
描述: IC MUX 4:1 LVPECL 1:2 FAN 32MLF
標準包裝: 60
系列: SY58
類型: 多路復用器
電路: 1 x 4:1
獨立電路: 1
電壓電源: 單電源
電源電壓: 3 V ~ 3.6 V
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 32-VFQFN 裸露焊盤,32-MLF?
供應商設(shè)備封裝: 32-MLF?(5x5)
包裝: 托盤
產(chǎn)品目錄頁面: 1089 (CN2011-ZH PDF)
其它名稱: 576-1387
5
Precision Edge
SY58030U
Micrel, Inc.
M9999-082707
hbwhelp@micrel.com or (408) 955-1690
SINGLE-ENDED AND DIFFERENTIAL SWINGS
VIN,
VOUT 400mV (Typ.)
Figure 1a. Single-Ended Voltage Swing
VDIFF_IN,
VDIFF_OUT 800mV (Typ.)
Figure 1b. Differential Voltage Swing
VCC = 2.5V ±5% or 3.3V ±10%; RL = 50 to VCC–2V; TA= –40°C to +85°C, VIN ≥ 100mV, unless otherwise stated.
Symbol
Parameter
Condition
Min
Typ
Max
Units
fMAX
Maximum Operating Frequency
NRZ Data
10.7
Gbps
VOUT ≥ 200mV
Clock
7
GHz
tpd
Propagation Delay (Diff)
(IN to Q)
VIN ≥ 100mV
170
260
340
ps
(SEL to Q)
100
500
ps
tpd Tempco
Differential Propagation Delay
115
fs/°C
Temperature Coefficient
tSKEW
Output-to-Output Skew
Note 9
720
ps
Part-to-Part Skew
Note 10
50
ps
tJITTER
Data
Random Jitter
Note 11
2.5Gbps to 3.2Gbps
1
psPP
Deterministic Jitter
Note 12
2.5Gbps to 3.2Gbps
10
psPP
Clock
Cycle-to-Cycle Jitter
Note 13
1psRMS
Total Jitter
Note 14
10
psPP
Crosstalk Induced Jitter
Note 15
0.7
psRMS
(Adjacent Channel)
tr, tf
Output Rise/Fall Time
20% to 80%, Full output swing
20
55
80
ps
Notes:
8. High frequency AC electricals are guaranteed by design and characterization.
9. Output-to-output skew is measured between outputs under identical input conditions.
10. Part-to-part skew is defined for two parts with identical power supply voltages at the same temperature and with no skew of the edges at the
respective inputs.
11. Random jitter is measured with a K28.7 comma detect character pattern, measured at 2.5Gbps to 3.2Gbps.
12. Deterministic jitter is measured at 2.5Gpbs to 3.2Gbps with both K28.5 and 223–1 PRBS pattern.
13. Cycle-to-cycle jitter definition: the variation of periods between adjacent cycles, Tn-Tn–1, where T is the time between rising edges of the output
signal.
14. Total jitter definition: with an ideal clock input of frequency ≤ fMAX, no more than one output edge in 10
12 output edges will deviate by more than the
specified peak-to-peak jitter value.
15. Crosstalk is measured at the output while applying two similar clock frequencies that are asynchronous with respect to each other at the inputs.
AC ELECTRICAL CHARACTERISTICS(8)
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