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參數(shù)資料
型號(hào): SY56020XRMG
廠商: Micrel Inc
文件頁數(shù): 2/9頁
文件大?。?/td> 0K
描述: IC CLOCK BUFFER 1:4 4.5GHZ 16MLF
標(biāo)準(zhǔn)包裝: 100
系列: Precision Edge®
類型: 扇出緩沖器(分配)
電路數(shù): 1
比率 - 輸入:輸出: 1:4
差分 - 輸入:輸出: 是/是
輸入: CML,LVDS,LVPECL
輸出: CML
頻率 - 最大: 4.5GHz
電源電壓: 2.375 V ~ 2.625 V
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 16-VFQFN 裸露焊盤,16-MLF?
供應(yīng)商設(shè)備封裝: 16-MLF?(3x3)
包裝: 管件
其它名稱: 576-3698-5
SY56020XRMG-ND
Micrel, Inc.
SY88993AL
September 2008
2
M9999-093008-A
hbwhelp@micrel.com or (408) 955-1690
Block Diagram
Detailed Description
The SY88993AL is a high-sensitivity limiting post
amplifier that operates from a single +3.3V power
supply, over temperatures from –40
oC to +85oC. Signals
with data rates up to 3.2Gbps and as small as 4mVPP
can be amplified. Figure 2 shows the allowed input
voltage swing. The SY88993AL generates a LOS output.
LOSLVL sets the sensitivity of the input amplitude
detection.
Input Amplifier/Buffer
Figure 3 shows a simplified schematic of the
SY88993AL’s input stage. The high-sensitivity of the
input amplifier allows signals as small as 4mVPP to be
detected and amplified. The input amplifier also allows
input signals as large as 1800mVPP. Input signals below
6mVpp are linearly amplified with a typical 38dB
differential voltage gain. Since it is a limiting amplifier,
the SY88993AL outputs typically 800mVPP voltage-
limited waveforms for input signals that are greater than
10mVPP. Applications requiring the SY88993AL to
operate with high-gain should have the upstream TIA
placed as close as possible to the SY88993AL’s input
pins to ensure the best performance of the device.
Output Buffer
The SY88993AL’s CML output buffer is designed to
drive 50 lines. The output buffer requires appropriate
termination for proper operation. An external 50
resistor to VCC for each output pin provides this. Figure 4
shows a simplified schematic of the output stage.
Loss-of-Signal
The SY88993AL generates a chatter-free LOS open-
collector TTL output which requires an external pull-up
resistor, as shown in Figure 1. LOS is used to determine
that the input amplitude is large enough to be considered
a valid input. LOS asserts high if the input amplitude falls
below the threshold sets by LOSLVL and de-asserts low
otherwise. LOS can be fed back to the enable bar (/EN)
input to maintain output stability under a loss of signal
condition. /EN de-asserts the true output signal without
removing the input signals. Typically, 5.6dB LOS
hysteresis is provided to prevent chattering.
Loss-of-Signal Level Set
The SY88993AL incorporates a programmable level
detect function to identify when the input signal has been
lost. This information can be fed back to the /EN input of
the device to maintain stability under loss of signal
conditions. Using LOSLVL pin the sensitivity of the level
detect can be adjusted. The LOSLVL voltage can be set
by connection a resistor divider between VCC and VREF,
Figure 5.
Hysteresis
The SY88993AL typically provides 5.6dB LOS electrical
hysteresis. By definition, a power ratio measured in dB is
10log (power ratio). Power is calculated as V
2
IN/R for an
electrical signal. Hence, the same ratio can be stated as
20log (voltage ratio). While in linear mode, the electrical
voltage input changes linearly with the optical power and
therefore, the ratios change linearly. Thus, the optical
hysteresis in dB is half the electrical hysteresis in dB
given in the data sheet. Since the SY88993AL is an
electrical device, this data sheet refers to hysteresis in
electrical terms. With 5.6dB LOS hysteresis, a voltage
factor of about 2 is required to assert or de-assert LOS.
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