參數(shù)資料
型號: SY56011RMG TR
廠商: Micrel Inc
文件頁數(shù): 3/6頁
文件大?。?/td> 0K
描述: IC CLK BUFFER 1:2 4.5GHZ 16-MLF
標準包裝: 1,000
系列: Precision Edge®
類型: 扇出緩沖器(分配)
電路數(shù): 1
比率 - 輸入:輸出: 1:2
差分 - 輸入:輸出: 是/是
輸入: CML,LVDS,LVPECL
輸出: CML
頻率 - 最大: 4.5GHz
電源電壓: 2.375 V ~ 2.625 V
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 16-VFQFN 裸露焊盤,16-MLF?
供應商設備封裝: 16-MLF?(3x3)
包裝: 帶卷 (TR)
Micrel, Inc.
SY56011R
July 2008
3
M9999-070208-A
hbwhelp@micrel.com or (408) 955-1690
Pin Description
Pin Number
Pin Name
Pin Function
1,2
IN, /IN
Differential Input: Signals as small as 200mV VPK (400mVPP) applied to the input of 9, 18 or
27 inches 6mil FR4 stripline transmission line are then terminated with this differential input.
Each input pin internally terminates with 50
to the VT pin.
3
VT
Input Termination Center-Tap: Each side of the differential input pair terminates to VT pin.
This pin provides a center-tap to a termination network for maximum interface flexibility. An
internal high impedance resistor divider biases VT to allow input AC-coupling. For AC-
coupling, bypass VT with 0.1F low ESR capacitor to VCC. See “Interface Applications”
subsection and Figure 2a.
6
EQ
Three level input for equalization control. High, float, low.
7
VCC
Positive Power Supply: Bypass with 0.1F//0.01F low ESR capacitors as close to the VCC
pins as possible. Supplies input and core circuitry.
8,13
VCCO
Output Supply: Bypass with 0.1F//0.01F low ESR capacitors as close to the VCCO pins as
possible. Supplies the output buffers.
14
GND,
Exposed pad
Ground: Exposed pad must be connected to a ground plane that is the same potential as the
ground pins.
12,11
10,9
Q0, /Q0
Q1, /Q1
CML Differential Output Pairs: Differential buffered copy of the input signal. The output swing
is typically 390mV. See “Interface Applications” subsection for termination information.
4,5,15,16
NC
No connect pins
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