參數資料
| 型號： | SY55857LKI TR |
| 廠商： | Micrel Inc |
| 文件頁數： | 5/7頁 |
| 文件大小： | 0K |
| 描述： | IC TRNASLATOR DUAL 3.3V 10-MSOP |
| 標準包裝： | 1,000 |
| 系列： | SY55 |
| 邏輯功能： | 變換器 |
| 位數： | 2 |
| 輸入類型： | CML，CMOS，HSTL，LVDS，TTL |
| 輸出類型： | LVPECL |
| 數據速率： | 2.5Gbps |
| 通道數： | 2 |
| 輸出/通道數目： | 1 |
| 差分 - 輸入:輸出： | 是/是 |
| 傳輸延遲（最大）： | 0.4ns |
| 電源電壓： | 3 V ~ 3.6 V |
| 工作溫度： | -40°C ~ 85°C |
| 封裝/外殼： | 10-TFSOP，10-MSOP（0.118"，3.00mm 寬） |
| 供應商設備封裝： | 10-MSOP |
| 包裝： | 帶卷 (TR) |
| 其它名稱： | SY55857LKITR SY55857LKITR-ND |
5
Precision Edge
SY10E111AE/LE
SY100E111AE/LE
Micrel, Inc.
M9999-030509
hbwhelp@micrel.com or (408) 955-1690
VEE = VEE (Min.) to VEE (Max.); VCC = GND
TA = –40
°CTA = 0°CTA = +25°CTA = +85°C
Symbol
Parameter
Min.
Typ.
Max.
Min.
Typ. Max.
Min.
Typ.
Max. Min.
Typ.
Max.
Unit
fMAX
Maximum Toggle Frequency
800
MHz
tPD
Propagation Delay to Output
ps
IN (differential)(2)
380
—
680
430
—
630
430
—
630
430
—
630
IN (single-ended)(3)
280
—
780
330
—
730
330
—
730
330
—
730
Enable(4)
400
—
900
450
—
850
450
—
850
450
—
850
Disable(4)
400
—
900
450
—
850
450
—
850
450
—
850
tskew
Within-Device Skew(5)
——
75
—
50
—
50
—
50
ps
Part-to-Part Skew (Diff.)
—
250
—
200
—
200
—
200
tS
Set-up Time, EN to IN(6)
250
—
0
200
0
—
200
0
—
200
0
—
ps
tH
Hold Time, IN to EN(7)
0—
–200
0
–200
—
0
–200
—
0
–200
—
ps
tR
Release Time, EN to IN(8)
350
—
100
300
100
—
300
100
—
300
100
—
ps
tJITTER
Random Clock Jitter
1
2
1
2
1
2
1
2
psRMS
VPP
Minimum Input Swing(9)
250
—
250
—
250
—
250
—
mV
VCMR
Common Mode Range(10)
–1.5
—
–0.4
–1.5
—
–0.4
–1.5
—
–0.4
–1.5
—
–0.4
V
tr
Rise/Fall Times
200
—
650
200
—
600
200
—
600
200
—
600
ps
tf
20% to 80%
AC ELECTRICAL CHARACTERISTICS(1)
Notes:
1. Parametric values specified at:
5 volt Power Supply Range
100E111AE Series:
-4.2V to -5.5V.
10E111AE Series
-4.75V to -5.5V.
3 volt Power Supply Range
10/100E111LE Series: -3.0V to -3.8V.
2. The differential propagation delay is defined as the delay from the crossing points of the differential input signals to the crossing point of the
differential output signals.
3. The single-ended propagation delay is defined as the delay from the 50% point of the input signal to the 50% point of the output signal.
4. Enable is defined as the propagation delay from the 50% point of a negative transition on EN to the 50% point of a positive transition on Q (or a
negative transition on Q). Disable is defined as the propagation delay from the 50% point of a positive transition on EN to the 50% point of a
negative transition on Q (or a positive transition on Q).
5. The within-device skew is defined as the worst case difference between any two similar delay paths within a single device.
6. The set-up time is the minimum time that EN must be asserted prior to the next transition of IN/IN to prevent an output response greater than
±75mV to that IN/IN transition (see Figure 1).
7. The hold time is the minimum time that EN must remain asserted after a negative going IN or a positive going IN to prevent an output response
greater than ±75mV to that IN/IN transition (see Figure 2).
8. The release time is the minimum time that EN must be de-asserted prior to the next IN/IN transition to ensure an output response that meets the
specified IN to Q propagation delay and output transition times (see Figure 3).
9. VPP (min) is defined as the minimum input differential voltage which will cause no increase in the propagation delay. The VPP (min) is AC limited
for the E111AE/LE, as a differential input as low as 50mV will still produce full ECL levels at the output.
10. VCMR is defined as the range within the VIH level may vary, with the device still meeting the propagation delay specification. the VIL level must be
such that the peak-to-peak voltage is less than 1.0V and greater than or equal to VPP (min).
For PECL operation: VCMR (max) = VCC – |VCMR (max)| and
VCMR (min) = VCC – |VCMR (min)|
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