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參數(shù)資料
| 型號(hào)： | SY55856UHITR |
| 廠商： | MICREL INC |
| 元件分類： | 通用總線功能 |
| 英文描述： | 2.5V/3.3V 2.5GHz DIFFERENTIAL 2-CHANNEL PRECISION CML DELAY LINE |
| 中文描述： | ACTIVE DELAY LINE, COMPLEMENTARY OUTPUT, PQFP32 |
| 封裝： | TQFP-32 |
| 文件頁(yè)數(shù)： | 2/9頁(yè) |
| 文件大?。?/td> | 87K |
| 代理商： | SY55856UHITR |
2
SuperLite
SY55856U
Micrel, Inc.
M9999-011207
hbwhelp@micrel.com or (408) 955-1690
PACKAGE/ORDERING INFORMATION
32-Pin EPAD-TQFP (H32-1)
Ordering Information
(1)
Package
Type
H32-1
H32-1
H32-1
Operating
Range
Industrial
Industrial
Industrial
Marking
55856U
55856U
55856U with
Lead
Finish
Sn-Pb
Sn-Pb
NiPdAu
Pb-Free
NiPdAu
Pb-Free
Part Number
SY55856UHI
SY55856UHITR
(2)
SY55856UHG
(3)
Pb-Free bar line indicator
55856U with
Pb-Free bar line indicator
SY55856UHGTR
(2, 3)
H32-1
Industrial
Notes:
1. Contact factory for die availability. Dice are guaranteed at T
A
= 25
°
C, DC Electricals only.
2. Tape and Reel.
3. Pb-Free package recommended for new designs.
32 31 30 29 28 27 26 25
9
10 11 12 13 14 15 16
1
2
3
4
5
6
7
8
24
23
22
21
20
19
18
17
Top View
EPAD-TQFP
H32-1
/DATA_IN
GND
DATA_IN
GND
GND
CLK_IN
GND
/CLK_IN
/DATA_OUT
GND
DATA_OUT
GND
GND
CLK_OUT
GND
/CLK_OUT
V
V
C
N
N
L
V
V
V
V
D
S
S
S
V
V
Pin Number
Pin Name
Pin Function
1, 3
/DATA_IN,
DATA_IN
CML Input (Differential). This is one of the CML inputs, the data in signal. A delayed
version of this signal appears at DATA_OUT, /DATA_OUT.
2, 4, 5, 7,
18, 20. 21, 23
GND
Ground.
22, 24
DATA_OUT,
/DATA_OUT
CML Output (Differential). This is one of the CML outputs, the data output. It is a delayed
version of DATA_IN , /DATA_IN.
6, 8
CLK_IN,
/CLK_IN
CML Input (Differential). This is one of the differential CML inputs, the clock in signal. A
delayed version of this input appears at CLK_OUT, /CLK_OUT.
17, 19
/CLK_OUT,
CLK_OUT
CML Output (Differential). This is one of the CML outputs, the clock output. It is a delayed,
copy of CLK_IN, /CLK_IN.
9, 10, 15, 16
25, 26, 31, 32
VCC
Power Supply.
11
CINV
VT Input (Single Ended). This is the clock inversion select signal. This input optionally
inverts the CLK_IN, /CLK_IN signal which results in an inverted CLK_OUT, /CLK_OUT. A
voltage below the VT threshold results in no inversion. A voltage above the threshold value
results in an inversion from the clock input to the clock output. Refer to the “VT input”
section below.
14
LVL
Analog Input. This input determines what level differentiates logic high from logic low. This
input affects the behavior of the CINV, S0, S1 and S2 inputs. Please refer to the “VT input“
section below for more details. For the control interface, see Figure 3a. For TTL control
interface, see Figure 3b.
30
DELAY_SEL
VT Input (Single Ended). CML compatible control logic. This is the delay path control input.
Logic high delays the clock signal with respect to the data signal. A logic low delays the
data signal with respect to the clock signal. Inputs S2, S1 and S0 control amount of delay.
27, 28, 29
S0, S1, S2
VT Input (Single Ended). CML compatible control logic. This is the delay selection control
input. These three bits define how much relative delay will occur between the data and
clock signals, as per the truth table shown in Table 2. For the control logic interface, see
Figure 3a. For TTL control interface, see Figure 3b. S0=LSB.
12, 13
NC
No Connect.
PIN DESCRIPTION
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| SY58017U_07 | ULTRA-PRECISION DIFFERENTIAL CML 2:1 MUX with INTERNAL I/O TERMINATION |
| SY58017UMG | ULTRA-PRECISION DIFFERENTIAL CML 2:1 MUX with INTERNAL I/O TERMINATION |
| SY58017UMGTR | ULTRA-PRECISION DIFFERENTIAL CML 2:1 MUX with INTERNAL I/O TERMINATION |
| SY58017UMI | ULTRA-PRECISION DIFFERENTIAL CML 2:1 MUX with INTERNAL I/O TERMINATION |
| SY58017UMITR | ULTRA-PRECISION DIFFERENTIAL CML 2:1 MUX with INTERNAL I/O TERMINATION |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| SY55857L | 制造商:MICREL 制造商全稱:Micrel Semiconductor 功能描述:3.3V, 2.5Gbps ANY INPUT-to-LVPECL DUAL TRANSLATOR |
| SY55857L_06 | 制造商:MICREL 制造商全稱:Micrel Semiconductor 功能描述:3.3V, 2.5Gbps ANY INPUT-to-LVPECL DUAL TRANSLATOR |
| SY55857LKG | 功能描述:轉(zhuǎn)換 - 電壓電平 Dual 2-5 GHz Any Input to LV PECL Translator (I Temp, Green) RoHS:否 制造商:Micrel 類型:CML/LVDS/LVPECL to LVCMOS/LVTTL 傳播延遲時(shí)間:1.9 ns 電源電流:14 mA 電源電壓-最大:3.6 V 電源電壓-最小:3 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:MLF-8 |
| SY55857LKG TR | 功能描述:轉(zhuǎn)換 - 電壓電平 Dual 2-5 GHz Any Input to LV PECL Translator (I Temp, Green) RoHS:否 制造商:Micrel 類型:CML/LVDS/LVPECL to LVCMOS/LVTTL 傳播延遲時(shí)間:1.9 ns 電源電流:14 mA 電源電壓-最大:3.6 V 電源電壓-最小:3 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:MLF-8 |
| SY55857LKGTR | 制造商:MICREL 制造商全稱:Micrel Semiconductor 功能描述:3.3V, 2.5Gbps ANY INPUT-to-LVPECL DUAL TRANSLATOR |
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