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參數(shù)資料
| 型號： | SY10H842ZHTR |
| 廠商： | MICREL INC |
| 元件分類： | 時鐘及定時 |
| 英文描述： | SINGLE SUPPLY QUAD PECL-TO-TTL OUTPUT ENABLE |
| 中文描述： | 10H SERIES, LOW SKEW CLOCK DRIVER, 4 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO16 |
| 封裝： | 0.300 INCH, LEAD FREE, SOIC-16 |
| 文件頁數(shù)： | 1/7頁 |
| 文件大?。?/td> | 77K |
| 代理商： | SY10H842ZHTR |
1
Precision Edge
SY10H842
SY100H842
Micrel, Inc.
M9999-032906
hbwhelp@micrel.com or (408) 955-1690
Pin
Function
G
T
TTL Ground (0V)
V
T
TTL V
CC
(+5.0V)
V
E
ECL V
CC
(+5.0V)
G
E
ECL Ground (0V)
D, D
Signal Input (PECL)
V
BB
V
BB
Reference Output (PECL)
Q
0
- Q
3
Signal Outputs (TTL)
EN
Enable Input (PECL)
DESCRIPTION
FEATURES
Precision Edge
I
Translates positive ECL-to-TTL (PECL-to-TTL)
I
300ps pin-to-pin skew
I
500ps part-to-part skew
I
Differential internal design for increased noise
immunity and stable threshold inputs
I
V
BB
reference output
I
Single supply
I
Enable input
I
Extra TTL and ECL power/ground pins to reduce
cross-talk/noise
I
High drive capability: 24mA each output
I
Fully compatible with industry standard 10K, 100K
I/O levels
I
Available in 16-pin SOIC package
The SY10/100H842 are single supply, low skew
translating 1:4 clock drivers.
The devices feature a 24mA TTL output stage, with
AC performance specified into a 50pF load capacitance.
A HIGH on the enable pin (EN) forces all outputs LOW.
As frequencies increase to 40MHz and above, precise
timing and shaping of clock signals becomes extremely
important. The H842 solves several clock distribution
problems such as minimizing skew 300ps), maximizing
clock fanout (24mA drive), and precise duty cycle control
through a proprietary differential internal design.
The 10K version is compatible with 10KH ECL logic
levels. The 100K version is compatible with 100K levels.
SINGLE SUPPLY QUAD
PECL-TO-TTL OUTPUT ENABLE
PIN NAMES
BLOCK DIAGRAM
D
D
Q
0
Q
1
Q
2
Q
3
V
BB
EN
ECL Input
TTL Outputs
Rev.: F
Issue Date:
Amendment: /0
March 2006
Precision Edge is a registered trademark of Micrel, Inc.
Precision Edge
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