參數(shù)資料
型號(hào): SY10E016JC
廠商: MICREL INC
元件分類(lèi): 通用總線功能
英文描述: Mounting Rack; Leaded Process Compatible:No; Peak Reflow Compatible (260 C):No
中文描述: 10E SERIES, SYN POSITIVE EDGE TRIGGERED 8-BIT UP BINARY COUNTER, PQCC28
封裝: PLASTIC, LCC-28
文件頁(yè)數(shù): 6/9頁(yè)
文件大?。?/td> 99K
代理商: SY10E016JC
6
SY10E016
SY100E016
Micrel
Programmable Divider
The E016 has been designed with a control pin which
makes it ideal for use as an 8-bit programmable divider. The
TCLD pin (load on terminal count), when asserted, reloads the
data present at the parallel input pin (Pn's) upon reaching
terminal count (an all 1s state on the outputs). Because this
feedback is built internal to the chip, the programmable
division operation will run at very nearly the same frequency
as the maximum counting frequency of the device. Figure 2
below illustrates the input conditions necessary for utilizing
the E016 as a programmable divider set up to divide by 113.
To determine what value to load into the device to accomplish
the desired division, the designer simply subtracts the binary
equivalent of the desired divide ratio for the binary value for
256. As an example for a divide ration of 113:
PN's = 256
113 = 8F
16
= 1000 1111
where
P
0
= LSB and P
7
= MSB
Forcing this input condition, as per the set-up in Figure 2, will
result in the waveforms of Figure 3. Note that the TC output
H
L
L
H
H
L
H
H
P
7
P
6
P
5
P
4
P
3
P
2
P
1
P
0
PE
CE
TCLD
CLK
Q
7
Q
6
Q
5
Q
4
Q
3
Q
2
Q
1
Q
0
TC
H
L
H
Figure 2. Mod 2 to 256 Programmable Divider
Figure 3. Divide by 113 E016 Programmable Divider Waveforms
CLOCK
PE
TC
LOAD
1001 0000
1001 0001
1111 1100
1111 1101
1111 1110
1111 1111
LOAD
Divide by 113
相關(guān)PDF資料
PDF描述
SY10E016JI 8-BIT SYNCHRONOUS BINARY UP COUNTER
SY10E016JITR 8-BIT SYNCHRONOUS BINARY UP COUNTER
SY10E101JI QUAD 4-INPUT OR/NOR GATE
SY100E101 Quad 4-Input OR/NOR Gate(四4輸入或門(mén)/或非門(mén))
SY10E101 Quad 4-Input OR/NOR Gate(四4輸入或門(mén)/或非門(mén))
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