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參數(shù)資料
| 型號： | SY100EL56VZI TR |
| 廠商： | Micrel Inc |
| 文件頁數(shù)： | 4/5頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC MUX 2:1 DUAL 3.3V/5V 20-SOIC |
| 標準包裝： | 1,000 |
| 系列： | 100EL |
| 類型： | 多路復(fù)用器 |
| 電路： | 2 x 2:1 |
| 獨立電路： | 1 |
| 電壓電源： | 雙電源 |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 20-SOIC（0.295"，7.50mm 寬） |
| 供應(yīng)商設(shè)備封裝： | 20-SOIC（寬型） |
| 包裝： | 帶卷 (TR) |
| 其它名稱： | SY100EL56VZITR SY100EL56VZITR-ND |
4
SY100EL56V
Micrel, Inc.
M9999-031306
hbwhelp@micrel.com or (408) 955-1690
AC ELECTRICAL CHARACTERISTICS
VEE =VEE (Min) to VEE (Max); VCC = GND
TA = -40
°CTA = 0°CTA = +25°CTA = +85C
Symbol
Parameter
Min.
Typ.
Max.
Min.
Typ.
Max.
Min.
Typ.
Max.
Min.
Typ.
Max. Unit
tPD
Propagation
D (Diff)
340
—
540
350
—
550
360
—
560
380
—
580
ps
Delay
D (SE)
290
—
590
300
—
600
310
—
610
330
—
630
to Output
SEL
430
—
730
440
—
740
440
—
740
450
—
750
COM_SEL
430
—
730
440
—
740
440
—
740
450
—
750
tSKEW
Within Device Skew(1)
—
40
80
—
40
80
—
40
80
—
40
80
ps
Duty Cycle Skew(2)
——
100
——
100
——
100
——
100
ps
VPP(AC) Minimum Input Swing(3)
150
—
1000
150
—
1000
150
—
1000
150
—
1000
mV
VCMR
Common Mode Range
V
VEE = –3.0V to –3.8V(4)
VPP < 500mV
–2.0
—–0.4
–2.1
—–0.4
–2.1
—–0.4
–2.1
—–0.4
VPP
≥ 500mV
–1.8
—–0.4
–1.9
—–0.4
–1.9
—–0.4
–1.9
—–0.4
VEE = –4.2V to –5.5V(5)
VPP < 500mV
–3.2
—–0.4
–3.3
—–0.4
–3.3
—–0.4
–3.3
—–0.4
VPP
≥ 500mV
–3.0
—–0.4
–3.1
—–0.4
–3.1
—–0.4
–3.1
—–0.4
tr
Output Rise/Fall Times Q
200
—
540
200
—
540
200
—
540
200
—
540
ps
tf
(20% –80%)
Note 1.
Within device skew is defined as identical transitions on similar paths through a device.
Note 2.
Duty cycle skew is defined only for differential operation when the delays are measured from the cross point of the inputs to the cross point of
the outputs.
Note 3.
Minimum input swing for which AC parameters are guaranteed.
Note 4.
The CMR range is referenced to the most positive side of the differential input signal. Normal operation is obtained if the HIGH level falls
within the specified range and the peak-to-peak voltage lies between V
PP(min) and 1V. The lower end of the CMR range varies 1:1 with VEE.
The numbers in the spec table assume a nominal V
EE = –3.3V. Note for PECL operation, the VCMR (min) will be fixed at 3.3V – |VCMR (min)|.
Note 5.
The CMR range is referenced to the most positive side of the differential input signal. Normal operation is obtained if the HIGH level falls
within the specified range and the peak-to-peak voltage lies between V
PP(min) and 1V. The lower end of the CMR range varies 1:1 with VEE.
The numbers in the spec table assume a nominal V
EE = –4.5V. Note for PECL operation, the VCMR (min) will be fixed at 5.0V – |VCMR (min)|.
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| SY100EL56ZC | 制造商:SYNERGY 功能描述: |
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| SY100EL57LZC | 功能描述:IC MULTIPLXR 4:1/2:1 DIFF 16SOIC RoHS:否 類別:集成電路 (IC) >> 邏輯 - 信號開關(guān)，多路復(fù)用器，解碼器 系列:100EL 標準包裝:25 系列:74HC 類型:解碼器 電路:1 x 2:4 獨立電路:2 輸出電流高，低:5.2mA，5.2mA 電壓電源:單電源 電源電壓:2 V ~ 6 V 工作溫度:-40°C ~ 85°C 安裝類型:通孔 封裝/外殼:16-DIP（0.300"，7.62mm） 供應(yīng)商設(shè)備封裝:16-DIP 包裝:管件 |
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