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參數(shù)資料
| 型號： | SY100E193JZ |
| 廠商： | MICREL INC |
| 元件分類： | 通用總線功能 |
| 英文描述： | ERROR DETECTION/CORRECTION CIRCUIT |
| 中文描述： | 100E SERIES, 8-BIT ERROR DETECT AND CORRECT CKT, TRUE OUTPUT, PQCC28 |
| 封裝： | LEAD FREE, PLASTIC, LCC-28 |
| 文件頁數(shù)： | 1/5頁 |
| 文件大?。?/td> | 73K |
| 代理商： | SY100E193JZ |
1
SY10E193
SY10E193
SY100E193
Micrel, Inc.
M9999-032006
hbwhelp@micrel.com or (408) 955-1690
Pin
Function
B
0
–B
7
Check Bit Inputs
BPAR
Check Bit Parity Input
EV/OD
Even/Odd Parity Select
EN
Parity Enable
HOLD
Syndrome Hold Input
S-IN
Syndrome Bit Input
SHIFT
Syndrome Bit Shift
CLK
Clock Input
P
1
–P
5
Parity Output
PGEN
Parity Generate Output
PARERR/PARERR
Parity Error Output
V
CCO
V
CC
to Output
I
Hamming code generation
I
Extended 100E V
EE
range of –4.2V to –5.5V
I
8-bit wide
I
Expandable for more width
I
Provides parity register
I
Fully compatible with industry standard 10KH,
100K ECL levels
I
Internal75K
input pulldown resistors
I
Fully compatible with Motorola MC10E/100E193
I
Available in 28-pin PLCC package
FEATURES
The SY10/100E193 are error detection and correction
(EDAC) circuits designed for use in new, high- performance
ECL systems. The E193 generates hamming parity codes
on an 8-bit word as shown in the block diagram. The P
5
output gives the parity of the whole word. PGEN provides
word parity after Odd/Even parity control and gating with
the BPAR input. PGEN also feeds into a 1-bit shiftable
register for use as part of a scan ring.
The combinatorial part of the device generates the same
code pattern as the Motorola MC10193.
Used in conjunction with 12-bit parity generators, such
as the E160, a SECDED (single error correction, double
error detection) error system can be designed for a multiple
of an 8-bit word.
DESCRIPTION
ERROR DETECTION/
CORRECTION CIRCUIT
PIN NAMES
Rev.: F
Issue Date:
Amendment: /0
March 2006
相關(guān)PDF資料 |
PDF描述 |
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| SY100E193JZTR | ERROR DETECTION/CORRECTION CIRCUIT |
| SY100E195JI | PROGRAMMABLE DELAY CHIP |
| SY100E195JITR | PROGRAMMABLE DELAY CHIP |
| SY100E195JY | PROGRAMMABLE DELAY CHIP |
| SY100E195JYTR | PROGRAMMABLE DELAY CHIP |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| SY100E193JZ TR | 功能描述:IC PARITY GENERATOR 8BIT 28PLCC RoHS:是 類別:集成電路 (IC) >> 邏輯 - 奇偶校驗發(fā)生器和校驗器 系列:100E 產(chǎn)品變化通告:Product Obsolescence 30/Sept/2009 標(biāo)準(zhǔn)包裝:25 系列:10H 邏輯類型:奇偶校驗發(fā)生器/校驗器 電路數(shù):12 位 輸出電流高，低:- 電源電壓:4.94 V ~ 5.46 V 工作溫度:0°C ~ 75°C 安裝類型:通孔 封裝/外殼:16-DIP（0.300"，7.62mm） 供應(yīng)商設(shè)備封裝:16-DIP |
| SY100E193JZTR | 制造商:MICREL 制造商全稱:Micrel Semiconductor 功能描述:ERROR DETECTION/CORRECTION CIRCUIT |
| SY100E195 | 制造商:MICREL 制造商全稱:Micrel Semiconductor 功能描述:PROGRAMMABLE DELAY CHIP |
| SY100E195JC | 制造商:Rochester Electronics LLC 功能描述:- Bulk 制造商:RF Micro Devices Inc 功能描述: |
| SY100E195JCTR | 制造商:MICREL 制造商全稱:Micrel Semiconductor 功能描述:PROGRAMMABLE DELAY CHIP |
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